In digital systems, the 1's complement and 2's complement are two ways to represent negative numbers in binary format.
1's Complement:
The 1's complement of a binary number is obtained by changing all the 0's to 1's and all the 1's to 0's. For example, the 1's complement of the binary number 0110 is 1001. To get the negative value of a binary number using the 1's complement method, we add a negative sign to the leftmost bit (most significant bit, or MSB). For example, if the MSB of a binary number is 1, then it is negative and we can convert it to its decimal equivalent by subtracting the decimal value of the positive version of the binary number from 2^(n-1), where n is the number of bits in the binary number.
2's Complement:
The 2's complement of a binary number is obtained by adding 1 to the 1's complement of the binary number. For example, the 2's complement of the binary number 0110 is obtained by first finding its 1's complement (1001) and then adding 1, which gives 1010. To get the negative value of a binary number using the 2's complement method, we again add a negative sign to the MSB. However, unlike the 1's complement method, we do not need to take an extra step of subtracting the decimal value of the positive version of the binary number. Instead, we can simply convert the binary number to its decimal equivalent as usual, and then apply the negative sign to the result.
The 2's complement method is preferred over the 1's complement method because it eliminates the need for a separate subtraction operation and provides a unique representation for every integer within the range of n-bit binary numbers. Additionally, it simplifies the implementation of arithmetic operations such as addition and subtraction in digital systems.
Binary subtraction can be performed using the 1's complement and 2's complement methods in digital systems. Here are the steps for each method:
1's Complement Method:
Step 1: Take the 1's complement of the subtrahend (the number being subtracted) by changing all the 0's to 1's and all the 1's to 0's.
Step 2: Add the minuend (the number being subtracted from) to the 1's complement of the subtrahend.
Step 3: If there is a carry from the most significant bit (MSB) after addition, add it back to the result.
Step 4: If the MSB of the result is 1, then the result is negative. Take the 1's complement of the result to get the final answer.
2's Complement Method:
Step 1: Take the 2's complement of the subtrahend by first finding its 1's complement (changing all the 0's to 1's and all the 1's to 0's), and then adding 1 to the result.
Step 2: Add the minuend to the 2's complement of the subtrahend.
Step 3: If there is a carry from the MSB after addition, ignore it.
Step 4: If the MSB of the result is 1, then the result is negative. Take the 2's complement of the result by first finding its 1's complement, and then adding 1 to the result, to get the final answer.
Example:
Perform binary subtraction using the 1's complement and 2's complement methods for the following values:
Minuend = 1101010
Subtrahend = 1010011
1's Complement Method:
Step 1: 1's complement of subtrahend = 0101100
Step 2: 1101010 + 0101100 = 10001110
Step 3: There is a carry from the MSB, so add it back to the result: 0001110
Step 4: Since the MSB is 0, the result is positive: 0001110
2's Complement Method:
Step 1: 2's complement of subtrahend = 0101101
Step 2: 1101010 + 0101101 = 10001111
Step 3: There is a carry from the MSB, but we ignore it.
Step 4: Since the MSB is 1, the result is negative. 2's complement of 10001111 = 0111001, which is the final answer.
Arithmetic circuits are digital circuits that perform mathematical operations such as addition and subtraction. Here are the details of some commonly used arithmetic circuits:
1-bit Half Adder: A half adder is a combinational logic circuit that adds two binary digits, typically represented by the variables A and B, and produces two binary outputs, the sum (S) and the carry (Cout).
A 1-bit half adder can be implemented using the following logic expressions:
S = A ⊕ B
Cout = A AND B
where ⊕ represents the XOR (exclusive OR) operator and AND represents the logical AND operator.
The truth table for a 1-bit half adder is:
A B S Cout
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
1-bit Full Adder: A full adder is a combinational logic circuit that adds three binary digits, typically represented by the variables A, B, and Cin (the carry-in), and produces two binary outputs, the sum (S) and the carry (Cout).
A 1-bit full adder can be implemented using the following logic expressions:
S = A ⊕ B ⊕ Cin
Cout = (A AND B) OR (Cin AND (A XOR B))
where ⊕ represents the XOR (exclusive OR) operator, AND represents the logical AND operator, and OR represents the logical OR operator.
The truth table for a 1-bit full adder is:
A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
1-bit Half Subtractor: A half subtractor is a combinational logic circuit that performs the subtraction of two bits. It takes two binary inputs, the minuend (A) and subtrahend (B), and produces two binary outputs, the difference (D) and the borrow (Bout).
A 1-bit half subtractor can be implemented using the following logic expressions:
D = A ⊕ B
Bout = A'B
where ⊕ represents the XOR (exclusive OR) operator and ' represents the NOT operator.
The truth table for a 1-bit half subtractor is:
The truth table for a 1-bit half subtractor is:
A B D Bout
0 0 0 0
0 1 1 0
1 0 1 1
1 1 0 0
1-bit FullSubtractor: A full subtractor is a combinational circuit that can subtract two 1-bit binary numbers and a borrow bit, and produce a difference and a borrow output. A full subtractor is used in multi-bit subtraction circuits to perform the subtraction operation on each pair of corresponding bits, taking into account the borrow generated by the subtraction of the previous bit.
The truth table for a 1-bit full subtractor is as follows:
A | B | Bin | D | Bout
0 | 0 | 0 | 0 | 0
0 | 0 | 1 | 1 | 0
0 | 1 | 0 | 1 | 1
0 | 1 | 1 | 0 | 1
1 | 0 | 0 | 0 | 0
1 | 0 | 1 | 0 | 1
1 | 1 | 0 | 1 | 1
1 | 1 | 1 | 0 | 0
4 bit parallel adder: A 4-bit parallel adder is a combinational circuit that can add two 4-bit binary numbers in parallel. The 4-bit parallel adder consists of four full adders and four XOR gates. The carry-out of each full adder is connected to the carry-in of the next full adder, forming a carry chain. The carry-in of the first full adder is usually set to 0.
Each full adder takes three inputs: the two corresponding bits of the input numbers and the carry-in from the previous adder. The full adder generates a sum and a carry-out bit. The sum bit is XORed with the carry-in bit using an XOR gate to produce the output bit of the adder. The carry-out bit is connected to the carry-in of the next full adder, forming the carry chain. The final carry-out bit is the carry of the last full adder, and is used to produce the final output.
A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
To implement a 4-bit subtractor using 2's complement circuit, we can use the following steps:
Convert the subtrahend to its 2's complement form.
Add the minuend and the 2's complement of the subtrahend using a 4-bit adder circuit.
If the carry-out of the adder is 1, it means that the result is negative. In this case, convert the result to its 2's complement form to obtain the final result.
In this circuit, the subtrahend is first converted to its 2's complement form using a NOT gate and an XOR gate. The minuend and the 2's complement of the subtrahend are then added using a 4-bit adder circuit. The output of the adder is the result of the subtraction, which may be negative if the carry-out of the adder is 1. If the carry-out is 1, the result is converted to its 2's complement form using another NOT gate and an XOR gate.
A decoder is a combinational logic circuit that converts a binary code into a set of mutually exclusive outputs. The two common types of decoders are the 2-to-4 decoder and the 3-to-8 decoder.
2-to-4 Decoder:
A 2-to-4 decoder is a combinational circuit that takes in a two-bit binary input code and outputs four mutually exclusive outputs, one of which is activated based on the input code. The truth table and logic diagram for a 2-to-4 decoder are as follows:
Input (A, B) | Output (Y0, Y1, Y2, Y3)
----------------------------------------
00 | 1 0 0 0
01 | 0 1 0 0
10 | 0 0 1 0
11 | 0 0 0 1
3-to-8 Decoder:
A 3-to-8 decoder is a combinational circuit that takes in a three-bit binary input code and outputs eight mutually exclusive outputs, one of which is activated based on the input code. The truth table and logic diagram for a 3-to-8 decoder are as follows:
000 | 1 0 0 0 0 0 0 0
001 | 0 1 0 0 0 0 0 0
010 | 0 0 1 0 0 0 0 0
011 | 0 0 0 1 0 0 0 0
100 | 0 0 0 0 1 0 0 0
101 | 0 0 0 0 0 1 0 0
110 | 0 0 0 0 0 0 1 0
111 | 0 0 0 0 0 0 0 1
An encoder is a combinational logic circuit that converts a set of mutually exclusive input codes into a binary output code. The two common types of encoders are the 4-to-2 encoder and the 8-to-3 encoder.
4-to-2 Encoder:
A 4-to-2 encoder is a combinational circuit that takes in four mutually exclusive input codes and outputs a two-bit binary code based on which input code is active. The truth table and logic diagram for a 4-to-2 encoder are as follows:
Input (D0, D1, D2, D3) | Output (Y0, Y1)
-------------------------------------------
0000 | 00
0001 | 01
0010 | 10
0011 | 11
0100 | 00
0101 | 01
0110 | 10
0111 | 11
1000 | 00
1001 | 01
1010 | 10
1011 | 11
1100 | 00
1101 | 01
1110 | 10
1111 | 11
8-to-3 Encoder:
An 8-to-3 encoder is a combinational circuit that takes in eight input bits and produces a three-bit binary code as output. The output code represents the binary equivalent of the decimal value of the input bit that is high. The truth table and logic diagram for an 8-to-3 encoder are as follows:
--------------------------------------------------------------
00000000 | 000
00000001 | 001
00000010 | 010
00000011 | 011
00000100 | 100
00000101 | 101
00000110 | 110
00000111 | 111
00001000 | 000
00001001 | 001
00001010 | 010
00001011 | 011
00001100 | 100
00001101 | 101
00001110 | 110
00001111 | 111
00010000 | 000
00010001 | 001
00010010 | 010
00010011 | 011
00010100 | 100
00010101 | 101
00010110 | 110
00010111 | 111
00011000 | 000
A multiplexer is a digital circuit that selects one of several inputs and forwards the selected input to a single output line. A 4-to-1 multiplexer has four input lines (D0, D1, D2, and D3), one output line (Y), and two selection lines (S0 and S1) that are used to select which input line is forwarded to the output line. The truth table for a 4-to-1 multiplexer is as follows:
S1 S0 | Y
0 0 | D0
0 1 | D1
1 0 | D2
1 1 | D3
In the truth table, S1 and S0 represent the two selection lines, and Y represents the output line. Depending on the values of S1 and S0, one of the four input lines D0-D3 is forwarded to the output line Y.
A demultiplexer is a digital circuit that takes a single input line and forwards it to one of several output lines. A 1-to-4 demultiplexer has one input line (D), four output lines (Y0, Y1, Y2, and Y3), and two selection lines (S0 and S1) that are used to select which output line the input line is forwarded to. The truth table for a 1-to-4 demultiplexer is as follows:
S1 S0 | Y0 Y1 Y2 Y3
--------|------------
0 0 | D 0 0 0
0 1 | 0 D 0 0
1 0 | 0 0 D 0
1 1 | 0 0 0 D
In the truth table, S1 and S0 represent the two selection lines, D represents the input line, and Y0-Y3 represent the four output lines. Depending on the values of S1 and S0, the input line D is forwarded to one of the four output lines Y0-Y3.
There are several types of codes used in digital systems, including weighted binary codes and non-weighted codes. Some of the most common types of codes are:
Weighted binary code: A weighted binary code assigns a weight to each digit, based on its position in the code. The weight is typically a power of 2, and the most significant digit has the highest weight. Two common weighted binary codes are:
Normal binary code: This is the simplest binary code, where each digit can take on one of two values (0 or 1). The weight of each digit is equal to its position in the code.
BCD (8421) code: This is a weighted binary code that is commonly used to represent decimal digits. Each decimal digit is represented by a 4-bit binary code, where the weight of each bit is 8, 4, 2, or 1. The 8421 notation comes from the weights of the bits (8, 4, 2, and 1, respectively).
2421 code: This is another weighted binary code that is commonly used to represent decimal digits. Each decimal digit is represented by a 4-bit binary code, where the weight of each bit is 2, 4, 2, or 1. This code has a simpler hardware implementation than BCD.
Non-weighted codes: Non-weighted codes do not assign weights to the digits in the code. Two common non-weighted codes are:
Excess-3 code: This is a non-weighted code that is used to represent decimal digits. Each decimal digit is represented by a 4-bit binary code that is offset by 3 from the corresponding BCD code. For example, the Excess-3 code for the decimal digit 0 is 0011, which is 3 more than the BCD code (0000). This code is often used in error detection and correction schemes.
Gray code: This is a non-weighted code that is used to represent numerical values. In a Gray code, adjacent values differ by only one bit. This can be useful in applications where small changes in the input signal should result in small changes in the output signal. Gray codes are often used in rotary encoders and other digital sensors.
Convert binary code to non-weighted code:
One common non-weighted binary code is the Excess-3 code. To convert a binary code to Excess-3 code, you need to add 0011 (the binary representation of 3) to the binary value, digit by digit. Here's an example:
Suppose you want to convert the binary number 1011 to Excess-3 code. First, write down the binary representation of 3:
0011
Next, add the two values, digit by digit, using binary addition with carry. Here's how it works:
1 0 1 1 (binary value)
0 0 1 1 (binary 3)
1 1 0 0 (Excess-3 code)
So the Excess-3 code for the binary number 1011 is 1100.
Note that if the sum of the binary value and 0011 is greater than 1111 (the maximum 4-bit binary value), you'll need to add an extra digit to the left to represent the carry. For example, if you want to convert the binary value 1111 to Excess-3 code, the sum is 1110 (binary) + 0011 (binary) = 11001 (binary), which requires an extra digit on the left to represent the carry. The Excess-3 code for 1111 is thus 10000.
To convert a binary code to Gray code, you can use the following algorithm:
The leftmost bit of the Gray code is the same as the leftmost bit of the binary code.
For each subsequent bit in the binary code, if the current bit and the previous bit are the same, the corresponding bit in the Gray code is 0; otherwise, the corresponding bit in the Gray code is 1.
Here's an example:
Suppose you want to convert the binary number 1010 to Gray code.
The leftmost bit of the Gray code is the same as the leftmost bit of the binary code, which is 1. So the leftmost bit of the Gray code is also 1.
For the second bit, the current bit is 0 and the previous bit is 1. Since they are different, the corresponding bit in the Gray code is 1.
For the third bit, the current bit is 1 and the previous bit is 0. Since they are different, the corresponding bit in the Gray code is 1.
For the fourth bit, the current bit is 0 and the previous bit is 1. Since they are different, the corresponding bit in the Gray code is 1.
Therefore, the Gray code for the binary number 1010 is 1111.
Note that the Gray code is sometimes also called the "reflected binary code" because the pattern of bits reflects the pattern of bits in the binary code.
Convert non weighted code to binary code:
To convert a non-weighted code to a binary code, you can use the following algorithm:
Determine the bit pattern for each code value.
Subtract the appropriate offset from the code value to get the corresponding binary value.
For example, let's say you want to convert an Excess-3 code value of 1001 to binary code.
First, determine the bit pattern for each Excess-3 code value. For example, the bit pattern for 0 in Excess-3 code is 0011, the bit pattern for 1 is 0100, and so on. You can create a table to show all the bit patterns for each code value.
Next, to convert the code value 1001 to binary code, you need to subtract the offset 0011 from the code value to get the corresponding binary value.
1001 (Excess-3 code value) - 0011 (offset) = 0110 (binary value)
So the binary code value corresponding to the Excess-3 code value of 1001 is 0110.
Note that this algorithm will vary depending on the non-weighted code you are trying to convert, as each non-weighted code has its own specific algorithm for converting to binary.
To convert a Gray code to binary code, you can use the following algorithm:
The leftmost bit of the binary code is the same as the leftmost bit of the Gray code.
For each subsequent bit in the Gray code, add the current bit to the next bit of the binary code to get the corresponding bit in the binary code.
Here's an example:
Suppose you want to convert the Gray code 1101 to binary code.
The leftmost bit of the Gray code is 1. So the leftmost bit of the binary code is also 1.
For the second bit, add the current bit (1) to the next bit of the binary code (0). This gives 1 + 0 = 1, which is the second bit of the binary code.
For the third bit, add the current bit (0) to the next bit of the binary code (1). This gives 0 + 1 = 1, which is the third bit of the binary code.
For the fourth bit, add the current bit (1) to the next bit of the binary code (1). This gives 1 + 1 = 10, which is the fourth bit of the binary code. However, since binary is a base-2 number system, we need to carry over the extra digit, so the result is 0 with a carry of 1.
Finally, add the carry of 1 to the leftmost bit of the binary code. This gives 1 + 1 = 10, which is the new leftmost bit of the binary code. However, since binary is a base-2 number system, we need to carry over the extra digit again, so the result is 0 with a carry of 1.
Therefore, the binary code corresponding to the Gray code 1101 is 1000.
Note that this algorithm works for any number of bits in the Gray code, as long as the number of bits in the binary code is the same.
A parity bit is an extra bit added to a binary code word to detect errors in transmission or storage. The parity bit is set to 0 or 1 depending on the number of 1's in the code word. If the number of 1's is even, the parity bit is set to 0, and if the number of 1's is odd, the parity bit is set to 1. There are two types of parity: even parity and odd parity.
A parity bit generator circuit generates the parity bit for a given binary code word, and a parity checker circuit checks if the received binary code word has an even or odd number of 1's.
Here are the circuits for a 4-bit even parity generator and checker:
Even Parity Generator Circuit:
Inputs: A, B, C, D Output: P P = (A + B + C + D) % 2
Even Parity Checker Circuit:
In the even parity generator circuit, the inputs A, B, C, and D are the 4 bits of the code word, and the output P is the parity bit. The parity bit is set to the modulo-2 sum of the input bits. The modulo-2 sum is the sum of the bits modulo 2 (i.e., the remainder when divided by 2), which is equivalent to the XOR operation.
In the even parity checker circuit, the inputs A, B, C, and D are the 4 bits of the received code word, and the input P is the received parity bit. The output Error is set to 1 if the received code word has an odd number of 1's (i.e., the modulo-2 sum of the input bits and the received parity bit is 1), indicating an error in transmission or storage.
The circuits for odd parity generator and checker are similar to the even parity circuits, with the only difference being the output P of the generator and the input P of the checker are complemented (i.e., inverted) with respect to the even parity circuits.