High Level Synthesis :
“Compiling Multi-dimensional Data Streams into Distributed DSP ASIC Memory”, IEEE International Conference on Computer Aided Design, 1991
“Just in Time Scheduling”, IEEE International Conference on Computer Design, 1992
“Hardware/Software Co-Design of Digital Telecommunication Systems”, Proceedings of the IEEE, 1997 pdf-files
“Synthesis of Pipelined DSP Accelerators with Dynamic Scheduling”, IEEE Transactions on VLSI, 1998
“Hardware Reuse at the Behavioral Level”, Proceedings IEEE Design Automation Conference, 1999
“A Methodology and Design Environment for DSP ASIC Fixed Point Refinement”, Proceeding of IEEE Design and Test in Europe, 1999
DSP :
“High Level Synthesis for Real Time DSP”, book, published by Springer, 1997
Video :
“ A Scalable Architecture for MPEG-4 Embedded Zero Tree Coding”, IEEE International Conference on Custom Integrated Circuits, 1999
Wireless :
“A Programmable CDMA IF Transceiver ASIC for Wireless Communications”, IEEE Custom Integrated Circuit Conference, 1995
“A 4*2.5Mchip/s Direct Sequence Spread Spectrum Receiver with Digital IF and Integrated ARM6 core”, IEEE Custom Integrated Circuit Conference, 1997
“A Digital 80Mb/s OFDM Transceiver IC for Wireless LAN in the 5 GHz Band”, IEEE ISSCC 2000, pdf-files
System In Package :
“A single package solution for wireless transceivers”, Proceedings IEEE Design and Test in Europe, 1999
“A Chip-Package Co-Design of a Low-Power 5-GHz RF Front End”, Proceedings of the IEEE, 2000
Platforms
“Are Single Chip Multiprocessors in Reach?”, IEEE Design and Test, 2001
“ Design Technology for Networked Reconfigurable FPGA Platforms”, Proceedings Design and Test in Europe, 2002