Computer Architecture and System SW Lab

Welcome to Computer Architecture and System SW Lab

The Computer Architecture and System SW Lab is a research lab led by professor Yongjun Park at Hanyang University. The focus of our research group is Compiler/OS/Architecture level solutions for Performance, Energy-efficiency on mobile/IOT/HPC devices (ILP (VLIW, CGRA), DLP (SIMD, GPU), Neural accelerators, and heterogeneous systems).

Research Goal: Platform-specific System Design

Specific Projects
1. Neural Accelerator Design and Compiler/OS support
2. CPU/GPU HW/SW Co-design for Future Mobile Application Processors
3. Approximate Computing for Big Data Processing and Security
4. Dynamic Binary Translation System

Required Skill Set: Computer architectures, Compilers, OS


* December 2016
Congratulations to Seongmin Hong, Jaehyung Im, and Inho Lee who received the 2nd award in the 2016 ALTERA Design Contest.

Now, we are looking for enthusiastic students:

Graduate Students (M.S. and Ph.D. students)
We are always looking for outstanding graduate students in the areas of computer architecture, compilers, OS, and design automation. Interested students should send me an email (yongjunpark at with your resume and a short description of your background and interests .

Undergraduate Students (Interns)
We like to encourage undergraduates to get involved with research, especially if they intend to go to graduate school. We work with a small number of excellent undergraduate students each semester. Students should be strong C++ programmers, knowledge of computer architecture, and have a basic familiarity with compilers and OS. Interested students should send me an email (yongjunpark at or drop by IT/BT building 701.