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Text mining research done: Currently, my area of work involves on i) developing explainable multi-label classification in the situation of noisy, incomplete, single label annotation with ill-defined and overlapping classes and ii) identifying domain specific terms and true noisy terms along with domain specific noise correction in an unsupervised manner within enterprise text (pertaining to different domains such as bank, finance, telecom etc.) which contains lots of erroneous words along with acronyms, abbreviations, domain specific terms which are not included in standard dictionary. I have also developed an explainable, easy deployable, computationally less expensive and capable of handling small datasets (which are often requirement issues pertaining to the enterprise text analytics) classifier (non deeplearning) for multi-label prediction which learns from data annotated with single label

Research interests: I am interested in working in the Text Mining, Machine Learning, Multi-Modal Data mining from the algorithm design and development, modelling, predictive modelling, analytical perspectives. I am also interested in developing biologically inspired machine learning algorithms specially motivated from Neuroscience.

Brief MS work: This work presents some techniques and algorithms to support teaching of logic design and computer organization through developing a web based virtual laboratory (COLDVL) and a formal verification method of bit-level equivalence checking for automatic evaluation of student designs. At the heart of the virtual laboratory is the COLDVL tool comprises a hierarchical logic module level drawing editor, a newly developed logic simulator as the back end with features to provide real laboratory like learning experience and a set of pre-designed guided experiments with the facility to add new experiments. A set of techniques has been introduced for efficient simulation such as partitioning a given gate level circuit into combinational and sequential parts and determining whether the circuit conforms to the Huffman model. Huffman circuits in particular are efficiently simulated in linear time. Circuit simulators often produce unknowns as outputs when actual circuits produce definite output values causing confusion to students using such simulators. Our simulator uses new techniques to overcome this problem for the benefit of the students. Automated checking of student assignments through application of formal verification is a novel feature of this work. A new bit-level equivalence checking method has been developed for this purpose to compare the designs submitted by students against a reference design provided by the instructor. A submitted design may differ from the reference design in non-trivial ways but may still be perfectly acceptable. The aim of the equivalence checker is to determine conformance to the reference design despite the differences.