Two domestic conference papers have been submitted.

Post date: Apr 20, 2017 5:31:22 AM

Our two papers have been submitted to the conference (한국 정보과학회 주체 "한국 컴퓨터 종합 학술 대회") that is going to be held in beautiful Jeju Island !

"A High-Resolution Supply Voltage Sensor and Its Performance Evaluations on an FPGA" by Toan

Abstract: Nowadays, integrated circuits (ICs) have higher integration densities. Simultaneous switching activity is one of the main causes that produces voltage drops across the power distribution network (PDN) of ICs, which may cause the timing failures. Therefore, a tool that supports for debugging the failures is essential. This paper presents a high-resolution supply voltage sensor that can be applicable for debugging timing failures, or determining the timing margins for the timing critical designs. Our supply voltage sensor is made up by using standard Look-up Table (LUT) cells, and dedicated carry cells with very small propagation delays. The experiments show that the voltage resolution of our supply voltage sensor is about 3.3 mV on a Xilinx FPGA Spartan-6 (XC6SLX9)

"Evaluation an EMI Reduction of a Multi-Frequency Clocking Circuit Utilizing Carry Chains in FPGAs" by Dam

Abstract: In this paper, we propose a multi-frequency clocking (MFC) circuit which utilizes carry chains on an FPGAs to reduce the electromagnetic interference (EMI) of digital circuits. Our MFC circuit uses the dedicated high-speed carry chain paths to finely adjust the clock frequency by assigning the different numbers of CARRY4s in the delay line. Our architecture has been implemented on the Spartan 6 FPGA (i.e., XFC6SLX9T). The results demonstrate that the EMI reduction can be obtained with 5.8 dB, 7.7 dB, 8.6 dB and 10.3 dB in the cases of using two, four, six and eight CARRY4 blocks at 31.5 MHz.