Asynchronous MIPS Microprocessor on an FPGA

Post date: Nov 2, 2011 7:16:36 AM

I am glad to announce our first version of "Asynchronous MIPS Microprocessor on an FPGA".

The core is named as "HAMIPS" (Hallym university Asynchronous MIPS processor) and it is designed and implemented on an FPGA device (Xilinx Virtex-5). The principle core designer is "Seung-Joon Lee", our third year research undergraduate student.

The processor is currently working correctly without a global clock. We eliminate hazard resolving unit for making the core as much as simply.

We are planned to update and advance the asynchronous MIPS core.

The demo can be found at the youtube site " http://www.youtube.com/watch?v=N1PoNFw-aGg "

Thanks.