Dr. Lu's research interests include: (a) analog power management IC design  (b) device/circuit/architecture/system co-design and joint optimization, (c) memristor-based deep neural network algorithms and hardware architecture. 

My resume [download]     Google Scholar Citation [Link]    Electrical Safety Training Materials for Construction Industry [Link]

J1. [TVLSI] Chao Lu, Chi-Ying Tsui, Wing-Hung Ki, “Vibration Energy Scavenging System with Maximum Power Tracking for Micro Power Applications,“ IEEE Transactions on VLSI Systems, vol. 19, issue 11, pp. 2109-2119, Nov. 2011 [PDF]

J2. [JETCAS] Chao Lu, Vijay Raghunathan, Kaushik Roy, “Efficient Design of Micro-Scale Energy Harvesting Systems,” vol.1, issue 3, pp. 254-266, 2011. [PDF]

J3. [JDT] Chih-Hisang Ho, Chao Lu, Kaushik Roy, “An Enhanced Voltage Programming Pixel Circuit for Compensating Brightness Variation in AMOLED Displays,” IEEE Journal of Display Technology, vol. PP, issue 99, 2014. [PDF]

J4. [TED] Selin Mungan, Chao Lu, Chih-Hisang Ho, Kaushik Roy, “Effects of Deposition Process on Poly-Si Micro-scale Energy Scavenging Systems”, IEEE Transactions on Electron Devices, vol. 63, no. 4, pp. 1650-1657, April, 2016. [PDF]

J5. [Elsevier] Xu Wang, Chao Lu, Zhigang Mao, "Charge Recycling 8T SRAM Design for Low Voltage Robust Operation, "International Journal of Electronics and Communications, volume 70, issue 1, pp. 25-32, January, 2016. [PDF]

J6. [Elsevier] Xu Wang, Yuanzhi Zhang, Chao Lu, Zhigang Mao, "Power Efficient SRAM Design with Integrated Bit Line Charge Pump", International Journal of Electronics and Communications, volume 70, issue 10, pp. 1395-1402, 2016 . [PDF]

J7. [Elsevier] Min Chen, Yuanzhi Zhang, Chao Lu, "Efficient Architecture of Variable Size HEVC 2D-DCT for FPGA Platforms", International Journal of Electronics and Communications, volume 73, issue C, pp. 1-8, 2017. [PDF]

J8. [APL] Y. Zhang, T. Yang, X. Yan, Z. Zhang, G. bai, C. Lu, X. Jia, B. Ding, J. Zhao, Z. Zhou, "A Metal/Ba0.6Sr0.4TiO3/SiO2/Si Single Film Device for Charge Trapping Memory Towards a Large Memory Window", Applied Physics Letter, 110, 223501, 2017. [PDF]

J9. [EDL] C. Ho, D. Tsai, C. Lu, S. Kim, S. Mungan, Y. Zhang, J. He, "Device Process and Circuit Application Interaction for Harsh Electronics: Radiation-Hardening Hf-In-Zn-O Thin Film Transistors as an Example", IEEE Electron Device Letters, vol. 38, no. 8, pp. 1039-1042, August, 2017. [PDF]

J10. [TCAS-II] L. Cao, R. Liu, Y. Zhang, M. Zhang, X. Li, W. Wang, H. Liu, C. Lu, "A 5.8GHz Digitally Controlled DSRC CMOS Receiver with A Wide Dyanmic Range for Chinese ETC System", IEEE Transactions on Circuits and Systems II, vol. 65, no. 6, pp. 754-758, June 2018. [PDF]

J11.  [TPDS] S. Li,  Y. Zhang, Y. Chen, C. Lu, D. Guo, "Race-Condition-Aware Task Partitioning and Scheduling Using Entropy Maximization", IEEE Transactions on Parallel and Distributed Systems, vol. 29, no. 7, pp. 1589-1604, July 2018. [PDF]

J12. [Elsevier] X. Li, R. Liu, Y. Zhang, W. Wang, H. Liu, C. Lu, "A 5.7~6 GHz CMOS PLL with low phase noise and -68dBc reference spur", International Journal of Electronics and Communications, vol. 85, pp. 23-31, 2018. [PDF]

J13. [Elsevier] M. Zhang, R. Liu, Y. Zhang, W. Wang, H. Liu, C. Lu, "A fully Integrated RSSI and ultra low power ADC for 5.8 GHz DSRC China ETC transceiver", International Journal of Electronics and Communications, vol. 86, pp. 154-163, 2018. [PDF]

J14. [Elsevier] B. Wei, C. Lu, "Transition Metal Dichalcogenide MoS2 Field-Effect Transistors for Analog Circuits: A Simulation Study", International Journal of Electronics and Communications, vol. 88, pp. 110-119, 2018. [PDF]

J15. [JEDS] X. Yan, H. Wang, Z. Zhang, C. Ho, H. He, C. Lu, X. Jia, Y. Zhang, T. Yang, J. Zhao, Z. Zhou, M. Zhao, "A graphene oxide quantum dots embedded charge trapping memory with enhanced memory window and data retention", IEEE Journal of the Electron Devices Society, vol. 6, pp. 464-467, 2018. [PDF]

J16. [Elsevier] H. Xu, Y. Zhang, C. Lu, G. Li, "A 0.45 ppm analog temperature compensated crystal oscilator using novel compensation algorithm and network", International Journal of Electronics and Communications, vol. 90, pp. 69-78, June 2018. [PDF]

J17. [TCSVT] Y. Zhang, C. Lu, "A Highly-Parallel Hardware Architecture of Table-based CABAC Bit Rate Estimator in HEVC Intra Encoder", IEEE Transactions on Circuits and Systems for Video Technology, vol. 25, no.9, pp. 1544 - 1558, 2019. [PDF]

J18. [Elsevier] H. Xu, Y. Zhang, X. Yan, K. Liang, C. Lu, G. Li, "A novel 0.84ppm/oC CMOS Curvature-Compensated Bandgap with 1.2V Supply Voltage", Journal of Electronics and Communications, vol. 91, pp. 66-74, May, 2018. [PDF]

J19. [APL] H. Wang, D. Ren, C. Lu, X. Yan, "Investigation of multilayer WS2 flakes as charge trapping stack layers in non-volatile memories", Applied Physics Letters, vol. 112, 231903, June, 2018. [PDF]

J20. [APL] X. Yan, J. Wang, M. Zhao, X. Li, H. Wang, L. Zhang, C. Lu, D. Ren, "Artificial electronic synapse characteristics of a Ta/Ta2O5-x/Al2O3/InGAZnO4 memristor device on flexible stainless steel substate", Applied Physics Letters, vol. 113, no. 1, 013503, 2018. [PDF]

J21. [IEICE] J. Hu, H. Xu, Y. Zhang, J. Sun, T. Du, C. Lu, G. Li, "A 1.2V Supply 0.58 ppm/oC CMOS Bandgap Voltage Reference", IEICE Electronics Express, vol. 15,  no. 16, pp. 20180521, August, 2018. [PDF]

J22. [FML] H. Wang, B. Ding, X. Tian, R. Zhao, Y. Zhang, C. Lu, X. Yan, D. Ren, "Improving Zr0.5Hf0.5O2-based charge trapped performance by graphene oxide quantum dots," Functional Materials Letters, vol. 12, no. 1, 2019. [PDF]

J23. [MRX] X. Jia, H. Wang, X. Li, J. Wang, T. Yang, Z. Zhou, J. Zhao, C. Lu, X. Yan, "Performance enhancement of nonvolatile memory by using a trapping layer of graphene oxide quantum dots," Materials Research Express, vol. 6, no. 2, 2018. [PDF] 

J24. [AFM] X. Yan, L. Zhang, H. Chen, X. Li, J. Wang, Q. Liu, C. Lu, J. Chen, H. Wu, P. Zhou, "Graphene oxide quantum dots based memristor with progressive conduction tuning for artificial learning," Advanced Functional Materials, published, 2018. [PDF]

J25. [APL] J. Wang, D. Ren, Z. Zhang, J. Zhao, X. Li, H. Wang, L. Zhang, M. Zhao, Y. Fang, C. Lu, C. Zhao, C. Zhao, X. Yan, "A radiation-hardening Ta/Ta2O5-x/Al2O3/InGaZnO4 memristor for harsh electronics," Applied Physics Letters, vol. 113, no. 12, 122907, 2018. [PDF]

J26. [APA] Z. Zhang, Y. Wu, C. Lu, S. Ahmed, "Electron mobility in β-Ga2O3: an ensemble Monte Carlo study", Applied Physics A,  124: 637, 2018. [PDF]

J27. [TCSVT] Y. Zhang, C. Lu, "Efficient Algorithm Adaptations and Fully-Parallel Hardware Architecture for HEVC Intra Encoder", IEEE Transactions on Circuits and Systems for Video Technology,  vol. 29, no. 11, pp. 3415-3429, 2019. [PDF]

J28. [IEICE] H. Xu, Y. Zhang, K. Liang, J. Wang, C. Lu, G. Li, "98pA, 0.17ppm/V, -72dB@100Hz Voltage Reference for Internet-of-Things Systems,"IEICE Electronics Express, article ID: 15.20180965, 2018. [PDF]

J29. [IEICE] H. Xu, Y. Zhang, K. Liang, J. Hu, C. Lu, G. Li, "A 2.1-ppm/oC all-MOSFET voltage reference with a 1.2-V supply voltage", IEICE Electronics Express, article ID: 15.20180922, 2018. [PDF]

J30. [APL] Z. Xiao, J. Zhao, C. Lu, et al., "Characteristic investigation of a flexible resistive memory based on a tunning junction of Pd/BTO/LSMO/Mica," Applied Physics Letters, vol. 113, no. 22, 223501, 2018. [PDF]

J31. [Elsevier] H. Xu, C. Lu, J. Hu, T. Du, J. Wang, Y. Zhang, G. Li, "A 28ppm/oC, 2.54ppm/V, -77dB@100Hz Pico-Ampere Voltage Reference for High-End IoT Systems,"Journal of Electronics and Communications, vol. 100, pp. 16-24, 2019. [PDF]

J32. [TODAES] J. Zheng, C. Lu, J. Guo, D. Chen, D. Guo, "A hardware-efficient block matching algorithm and its hardware design for variable block size motion estimation," ACM Transactions on Design Automation of Electronic Systems, vol. 24, no. 2, article 15, 21 pages, January 2019. [PDF]

J33. [JMC] Z. Zhou, X. Yan, J. Zhao, C. Lu, et al., "Synapse behavior characterization and physics mechanism of a TiN/SiOx/p-Si tunneling memristor device," Journal of Materials Chemistry C, vol. 7, pp. 1561-1567, 2019. [PDF]

J34. [TCSVT] Y. Zhang, C. Lu, "High-performance algorithm adaptations and hardware architecture for HEVC intra encoders," IEEE Transactions on Circuits and Systems for Video Technology, vol. 29, no. 7, pp. 2138-2145, 2019.  [PDF]

J35. [APL] X. Yan, H. Li, Z. Zhang, C. Lu, et al., "Density effects of graphene oxide quantum dots on characteristics of Zr0.5Hf0.5O2 film memristors," Applied Physics Letters, vol. 114, 162906, 2019. [PDF]

J36. [MRX] B. Zhang, Q. Gao, B. Wang, H. Wang, C. Lu, J. Gao, R. Zhao, X. Yan, "Effects of oxygen conditions during deposition on memory performance in HfO2 for charge trapping memory," Materials Research Express, vol. 6, no. 8, 086306, 2019. [PDF]

J37. [Integration] X. Qu, R. Liu, W. Wang, Y. Zhang, H. Liu, C. Lu, "A 5.8GHz DSRC Digitally Configurable RF-SoC Transmitter Design for ETC System", Integration the VLSI Journal, vol. 68, pp. 1-9, 2019. [PDF]

J38. [Elsevier] G. Zhao, Y. Wang, C. Lu, W. Hu, Z. Xiao, “A power-switch thermal limiting technique for current-mode monolithic DC-DC converters,” International Journal of Electronics and Communications [Elsevier], vol. 111, pp. 1-8, 2019. [PDF]

J39. [Elsevier] G. Zhao, Y. Xu, C. Lu, W. Hu, Z. Xiao, "An automatic slope compensation adjustment technique for peak-current mode DC-DC converters," International Journal of Electronics and Communications, vol. 110, pp. 1-9,  2019. [PDF]

J40. [AMI] X. Yan, X. Li, Z. Zhou, J. Zhao, H. Wang, J. Wang, L. Zhang, J. Chen, C. Lu, Q. Liu, "Flexible Transparent Organic Artificial Synapse Based on the Tungsten/Egg Albumen/Indium Tin Oxide/Polyethylene Terephthalate Memristor," ACS Applied Materials & Interfaces, vol. 11, pp. 18654-18661, 2019. [PDF]

J41. [Integration] B. Wei, T. Chen, C. Lu, W. Xu, Y. Zhang, M. Wei, H. Yue, J. Duan, "An all-digital frequency tunable IR-UWB transmitter with an approximate 15th derivative Gaussian pulse generator," Integration the VLSI Journal, vol. 69, pp. 301-308, 2019. [PDF]

J42. [AMI] X. Yan, C. Qin, C. Lu, J. Zhao, R. Zhao, etc, "Robust Ag/ZrO2/WS2/Pt Memristor for Neuromorphic Computing", ACS Applied Materials & Interfaces, vol. 11, pp. 48029-48038, 2019. [PDF]

J43. [APL] X. Yan, Z. Xiao, C. Lu, "Characteristic investigation of highly-oriented Hf0.5Zr0.5O2 thin films resistive memory devices", Applied Physics Letters, vol. 116, no. 1, 2020 [PDF]

J44. [JCE] Y. Wu, R. Zhao, C. Lu, D. Guo, "Modeling of Single-Electron Tunneling Networks for Super-Sensitive Sensors at Room Temperature", Journal of Computational Electronics, January, 2020. [PDF]

J45. [AEM] K. Wang, L. Li, R. Zhao, J. Zhao, Z. Zhou, J. Wang, H. Wang, B. Tang, C. Lu, J. Lou, J. Chen, X. Yan, "A Pure 2H-MoS2 Nanosheets-Based Memristor with Low-Power Consumption and Multilevel Storage for Artificial Synapse Emulator", Advanced Electronic Materials, vol. 6, no. 3, 2020. [PDF]

J46. [IJCIS] L. Gao, K. Dai, C. Lu, "Research on Optimized Online Allocation of Scope Spatial Crowdsourcing Tasks", International Journal of Cooperative Information Systems, vol. 29, no. 3, 2050003, 2020. [PDF]

J47.  [Elsevier] J. Hu, H. Xu, J. Wang, K. Liang, G. Li, C. Lu, "A novel precision CMOS current reference for IoT systems“，International Journal of Electronics and Communications, vol. 130, 153577, 2021. [PDF]

J48. [TCDS] J. Zheng, C. Lu, C. Hao, D. Chen, D. Guo, "Improving the generalization ability of deep neural networks for cross-domain visual recognition," IEEE Transactions on Cognitive and Development Systems, vol. 13, no. 3, pp. 607-620, 2021. [PDF]

J49. [TNNLS] T. Huang, D. Zhang, L. Bi, C. Lu, "Neural Embedding Singular Value Decomposition for Collaborative Filtering", IEEE Transactions on Neural Networks and Learned Systems, early access in IEEE Xplore, 2021. [PDF]

J50. [Elsevier] B. Wei, C. Lu, "Exploring device-circuit co-design in LC VCO circuits using monolayer transition metal dichacogenide MoS2 field-effect transistors," International Journal of Electronics and Communications [Elsevier], vol. 138, 153867, 2021. [PDF]

J52. [Elsevier] Y. Hu, Z. Li, J. Hou, W. Ma, C. Lu, Z. Xiao, H. Liu, W. Hu, "A Constant Charging-Current Relaxation Oscillator with a Duty-Cycled Main Comparator Scheme and the Adaptive Auxiliary Comparator", Microelectronics Journal [Elsevier], 2022. [PDF]

J53. [TNNLS] Z. Tang, L. Luo, B. Xie, Y. Zhu, R. Zhao, L. Bi, C. Lu, "Automatic sparse connectivity learning for neural networks", IEEE Transactions on Neural Networks and Learned Systems, early access in IEEE Xplore, 2022. [PDF]

J54. [TKDE] T. Huang, R. Zhao, N. Wang, D. Zhang, C. Lu, "NEFM: Neural embedding based factorization machines for user response prediction", IEEE Transactions on Knowledge and Data Engineering, first-round review, 2020. [PDF]

J55. [IEEE Access] R. Zhao, Z. Tang, C. Lu, "Effects of memristor state density on artificial neural networks: a simulation study", IEEE Access, first-round review, 2020. [PDF]

J55. [Elsevier] Z. Wang, B. Fan, C. Lu, H. Liu, "High-Speed Configurable IIR Bandpass Filter ASIC Design",  International Journal of Electronics and Communications [Elsevier], under review, 2022. [PDF]

J56. [Elsevier] Z. Xiao, Z. Zhao, Y. Zhao, C. Lu, W. Hu, F. Luo, "A thermal protection circuit for fast battery charging LDOs",  International Journal of Electronics and Communications [Elsevier], under review, 2022. [PDF].

J57. [TVLSI] W. Hu, H. Cui, J. Feng, Y. Hu, J. Hou, Z. Li, C. Lu, Z. Xiao, W. Ma, "A 16-bit Two-Stage Non-pipelined ADC with a GM-R Amplifier", IEEE Transactions on VLSI Systems, minor revision, 2023. [PDF].

C21. W. Zhang, B. Fan, C. Lu, H. Liu, "LADRC Based Digital Control DC-DC ASIC Design", IEEE International Conference on Electrical, Electronic Information and Communication Engineering , 2022. [PDF]

C20. [ISCAS'2019] H. Xu, Y. Chen, C. Lu, J. Hu, G. Li, "Pico-Ampere Voltage References for IoT Systems", IEEE International Symposium on Circuits and Systems, pp. 1-5, 2019. [PDF]

C19. [NMDC'2018] Z. Zhang, Y. Wu, C. Lu, S. Ahmed, "Electronic structure and carrier transport analysis in β-Ga2O3 using a two-valley ensemble Monte Carlo framework," IEEE Nanotechnology Materials and Device Conference, pp. 1-4, 2018 [PDF].

C18. [ASPDAC'2018] H. Liu, Xiongfei Qu, Lingling Cao, Ruifeng Liu, Yuanzhi Zhang, Meijuan Zhang, Xiaoqiang Li, Wenshen Wang, C. Lu, "A 5.8 GHz DSRC Digitally Controlled CMOS RF-SoC Transceiver for China ETC", University LSI Design Contest, Asia and South Pacific Design Automation Conference, pp. 323-324, 2018. [PDF]

C17. [DAC'2017] Kane Rodriguez, Nick Whetstone, Steven Habel, Chao Lu, "A Smart IoT Prototype for Accurate People Counting Towards Energy Efficient Smart Building", Design Automation Conference, 2017 [PDF]. (Top 5 finalist for 2017 DAC International Hardware Design Contest [mentionable honor], highlighted at DAC in the World of IoT exhibit)

C16. [ICMAT'2017] Yanyang Zhang, Zichang Zhang, Chao Lu, Yang Xia, "Quantum Capacitance of Topological Material Devices", 9th International Conference on Materials for Advanced Technologies, 2017. [PDF]

C15. [SOCC'2016] S. Leitner, P. West, Chao Lu, Haibo Wang, "Digital LDO Modelling for Early Design Space Exploration", IEEE SOCC, 2016. [PDF] (Best Paper Award Nomination)

C14. [IMECS'2014] T. O. Ting, Ka Lok Man, Nan Zhang, Chi Un Lei, Chao Lu, "State-Space Battery Modelling for Smart Battery Management System", IMECS, 2014. [PDF] (Best Paper Award)

C13. [SISPAD’2013] Chen-Wei Lin, Chi-Hisang Ho, Chao Lu, etc. ”A Process/Device/Circuit/System Compatible Simulation Framework for Poly-Si TFT Based SRAM Design", SISPAD, 2013. [PDF].

C12. [Semi-Therm’2013] Sri Harsha Choday, Chao Lu, Vijay Raghunathan, Kaushik Roy, ”On-chip Energy Harvesting Using Thin-film Thermoelectric Materials”, Semi-Therm, 2013. [PDF].

C11. [SISPAD’2012] Chih-Hisang Ho, G. D. Panagopoulos, Chao Lu, Kaushik Roy, “A Physical Model to Predict Grain Boundary Induced Vth Variation in Poly-Si TFTs”, SISPAD, pp.145-148, 2012. [PDF]

C10. [ISLPED’2012] Selin Baytok, Chao Lu, Kaushik Roy, Vijay Raghunathan, “Modeling, Design and Cross-Layer Optimization of Polysilicion Solar Cell Based Micro-Scale Energy Harvesting System”, International Symposium on Low Power Electronics and Design, pp. 123-128, 2012. [PDF]

C9. [VLSID’2012] Chao Lu, Sang-Phill Park, Vijay Raghunathan, Kaushik Roy, “Low-Overhead Maximum Power Point tracking for Micro-Scale Solar Energy Harvesting Systems,” VLSI Design, pp. 215-220, 2012. [PDF]

C8. [DATE’2011] Chao Lu, Sang-Phill Park, Vijay Raghunathan, Kaushik Roy, “Stage Number Optimization for Switched Capacitor Power Converters in Micro-Scale Energy Harvesting”, Design Automation and Test in Europe, pp. 770-775, 2011. [PDF].

C7. [ASPDAC’2011] Chih-Hisang Ho, Chao Lu, Debarata Mohapatra and Kaushik Roy, “Variation-Tolerant and Self-Repair Design Methodology for Low Temperature Polycrystalline Silicon Liquid Crystal and Organic Light Emitting Diode Displays”, IEEE Asia and South Pacific Design Automation Conference, pp. 695-700, 2011. [PDF]

C6. [ISLPED’2010] Chao Lu, Sang-Phill Park, Vijay Raghunathan, Kaushik Roy, “Analysis and Design of Ultra Low Power Thermoelectric Energy Harvesting Systems”, International Symposium on Low Power Electronics and Design, pp. 183-188, 2010. [PDF]

C5. [ISCAS’2010] Chao Lu, Vijay Raghunathan, Kaushik Roy, “Maximum Power Point Considerations for Micro-Scale Solar Energy Harvesting Systems”, IEEE International Symposium on Circuits and Systems, pp. 273-276, 2010. [PDF]

C4. [DATE’2010] Chao Lu, Sang-Phill Park, Vijay Raghunathan, Kaushik Roy, “Efficient Power Conversion for Ultra Low Voltage Micro Scale Energy Transducers”, Design Automation and Test in Europe, pp. 1602-1607, 2010. [PDF]

C3. [ASPDAC’2010] Chao Lu, Vijay Raghunathan, Kaushik Roy, “Micro-scale Energy Harvesting: A System Perspective”, Special Session, Asia and South Pacific Design Automation Conference, pp. 89-94, 2010. [PDF]

C2. [ISLPED’2007] Lu Chao, Chi-Ying Tsui, Wing-Hung Ki, “Vibration Energy Scavenging and Management for Ultra Low Power Applications”, International Symposium on Low Power Electronics and Design, pp. 316-321, 2007. [PDF] (Best Paper Award)

C1. [ISCAS’2007] Lu Chao, Chi-Ying Tsui, Wing-Hung Ki, “A Batteryless Vibration-based Energy Harvesting System for Ultra Low Power Ubiquitous Applications,” IEEE International Symposium on Circuits and Systems, pp. 1349-1352, May 2007. [PDF]

Patents:

1. US Patent (No. 65562.00.US), Title "Tree Topology Charge Pump Design"

2. US Patent (US 8994396 B2), Title "Variation-Tolerant Self-Repairing Displays"

3. US Patent (US 2019/0327473 A1), Title "Parallel Table-Based Bit Rate Estimator"

        Journal/Conference Referees Service:

             1. IEEE Transactions on Very Large Scale Integration (VLSI) Systems

             2. IEEE Transactions on Circuit and Systems

             3. IEEE Transactions on Circuit and Systems II

             4. IEEE Transactions on CAD of Integrated Circuits and Systems

             5. IEEE Transactions on Computers

             6. IEEE Transactions on Electron Devices

             7. IEEE Embedded System Letters

             8. IEEE Design & Test of Computers

             9. ACM Transaction on Mobile Computing

            10. IEEE Journal of Solid-State Circuits

            11. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 

            12. ACM Transactions on Design Automation of Electronic Systems 

            13. ACM Transactions on Embedded Computing Systems

            14. ACM Journal of Emerging Technologies in Computing

            15. Design, Automation & Test in Europe Conference and Exhibition

            16. IEEE International Symposium on Circuits and Systems

            17. Asia and South Pacific Design Automation Conference

            18. International Conference on VLSI Design 

            19. IEEE International Midwest Symposium on Circuits and Systems

            20. IEEE Asia Pacific Conference on Circuits and Systems

           Students

           Ph.D. Yuanzhi Zhang, now working in ByteDance, CA

          Ph.D. Rujie Zhao 

   M.S  Xiaojie Liu, now working in Silergy, CA

   M.S Rashik Shadman (Ph.D. student in Clarkson University)

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