Publications

Authors with * signs contribute equally to the papers.

Journal Papers

25. [TMLR] Y. Sui, H. Phan, J. Xiao, T. Zhang, Z. Tang, C. Shi, Y. Wang, Y. Chen and B. Yuan, “DisDet: Exploring Detectability of Backdoor Attack on Diffusion Models,” Transactions on Machine Learning Research (TMLR), June 2025.

24. [TODAES] D. Fang, H. Hu, B. Zhang, W. Li, B. Yuan and J. Hu, “Global Placement Exploiting Soft 2D Regularity,” ACM Transactions on Design Automation of Electronic Systems, Jan. 2025.

23. [TNNLS] Y. Sui, M. Yin, Y. Gong and B. Yuan, "Co-Exploring Structured Sparsification and Low-Rank Tensor Decomposition for Compact DNNs," IEEE Transactions on Neural Networks and Learning Systems, April 2025.

22. [TNNLS] X. Liu, X. Wang, B. Yuan and J. Han, "Spectral Tensor Layers for Communication-free Distributed Deep Learning," IEEE Transactions on Neural Networks and Learning Systems, April 2025.

21. [TMC] Z. Tang, T. Zhao, T. Zhang, H. Phan, Y. Wang, C. Shi, B. Yuan and Y. Chen, "RF Domain Backdoor Attack on Signal Classification Via Stealthy Trigger," accepted by IEEE Trans. on Mobile Computing.

20. [TCAD] J. Song, R. Liang, B. Yuan and J. Hu, "DiMO-CNN: Deep Learning Toolkit-Accelerated Analytical Modeling and Optimization of CNN Hardware and Dataflow," accepted by IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems.

19. [Production Engineering] L. Hu, H. Phan, S. Srinivasan, C. Cooper, J. Zhang, B. Yuan, R. Gao and Y. Guo, "Multimodal data-driven machine learning for the prediction of surface topography in end milling," Springer Production Engineering, Jan. 2024.

18. [TC] Y. Gong*, M. Yin*, L. Huang, C. Deng and B. Yuan, "Algorithm and Hardware Co-Design of Energy-Efficient LSTM Networks for Video Recognition with Hierarchical Tucker Tensor Decomposition," IEEE Trans. on Computers, Dec. 2022.

17. [JSPS] Y. Xie, Z. Li, C. Shi, J. Liu, Y. Chen and B. Yuan, “Real-time, Robust and Adaptive Universal Adversarial Attacks Against Speaker Recognition Systems,” Springer Journal of Signal Processing System, Feb. 2021. 

16. [TC] C. Deng*, S. Liao* and B. Yuan, “PermCNN: Energy-efficient Convolutional Neural Network Hardware Architecture with Permuted Diagonal Structure,” IEEE Trans. on Computers, vol. 70, no. 2. Feb. 2021.  

15. [JETC] B. Li, Y. Qin, B. Yuan and D. Lilja, “Neural Network Classifiers using a Hardware-based Approximate Activation Function with a Hybrid Stochastic Multiplier,” ACM Journal on Emerging Technologies in Computing, vol. 15, no.1, Dec. 2019. 

14. [TCAD]  Z. Li, J. Li, A. Ren, R. Cai, C. Ding, X. Qian, J. Draper, B. Yuan, J. Tang, Q. Qiu and Y. Wang, “HEIF: Highly Efficient Stochastic Computing based Inference Framework for Deep Neural Networks”, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 8, Aug. 2018.

13. [TCAS-II] Y. Xie, S. Liao, B. Yuan, Y. Wang, and Z. Wang, "Fully-Parallel Area-Efficient Deep Neural Network Design using Stochastic Computing, " IEEE Trans. Circuits and Systems II, vol. 64, no. 12, pp. 1382-1386, Dec. 2017. 

12. [TSC] S. Liao, Y. Xie, X. Lin, Y. Wang, M. Zhang and B. Yuan, "Reduced-Complexity Deep Neural Networks Design using Multi-Level Compression," IEEE Trans. Sustainable Computing, 2017.

11. [JETC] B. Yuan and K.K. Parhi, "VLSI Architectures for the Restricted Boltzmann Machine," ACM Journal on Emerging Technologies in Computing, vol. 23, no. 3, May 2017.

10. [TCAD] Y. Lao, B. Yuan, C. Kim and K.K. Parhi, "Reliable PUF-based Local Authentication with Self-Correction," IEEE Trans. Computer-Aided Design, vol. 36, no. 2, pp. 201-213, Feb. 2017.

9. [TCAS-II] B. Yuan and K.K. Parhi, "LLR-Based Successive-Cancellation List Decoder for Polar Codes with Multi-bit Decision," IEEE Trans. Circuits and Systems II, Express Briefs, vol. 64, no. 1, pp. 21-25, Jan. 2017.

8. [TCAS-II] B. Yuan, Y. Wang and Z. Wang, "Area-Efficient Scaling-free DFT/FFT Design using Stochastic Computing," IEEE Trans. Circuits and Systems II, vol. 63, no. 12, pp. 1131-1135, Dec. 2016.

7. [TMAG] Y. Wang, B. Yuan and K.K. Parhi, "Increased Data Throughput and BER Performance with Rotated Head Array in the Two Dimensional Magnetic Recording," IEEE Trans. Magnetics, vol. 52, no. 7, July 2016.

6. [TVLSI]  B. Yuan and K.K. Parhi, "Low-Latency Successive-Cancellation List Decoders for Polar Codes with Multi-bit Decision," IEEE Trans. VLSI, vol. 23. no. 10, pp. 2268-2280, Oct. 2015.

5. [TSP] B. Yuan and K.K. Parhi, “Early Stopping Criteria for Energy-Efficient Low-Latency Belief-Propagation Polar Code Decoders,” IEEE Trans. Signal Processing, vol. 62, no. 24, pp. 6496-6506, Dec. 2014.

4. [TMAG] Y. Wang, B. Yuan, K.K. Parhi and R. Victora, "Two-Dimensional Magnetic Recording using a Rotated Head Array and  LDPC Code Decoding,"IEEE Trans. on Magnetics, vol. 50, no. 11, Nov. 2014.

3. [TCAS-I] B. Yuan and K.K. Parhi, “Low-Latency Successive-Cancellation Polar Decoder Architectures using 2-bit Decoding,” IEEE Trans. Circuits and Systems-I: Regular Papers, vol. 61, no. 4, pp. 1241-1254, Apr. 2014. (Most cited paper in TCAS-I in 5 years)

2. [TVLSI] L. Li, B. Yuan, Z. Wang etc, “Unified Architecture for Reed-Solomon Decoder Combined with Burst-Error Correction,” IEEE Trans. VLSI, vol. 20, no.7, pp. 1346-1350, July 2012.

1. [TCAS-II] Yuan B., Wang Z., Li L. etc, “Area-efficient Reed–Solomon decoder design for optical communications,”IEEE Trans. Circuits and Systems II, Express Briefs, vol. 56, no. 6, pp. 469-473, June 2009.

Conference Papers

106. [ISCA] S. Liang, J. Xu, G. Bassanino, Q. Wang, Y. Zhou, Y. Lu, Z. Mo, P. Kelly, B. Yuan, W. Luk and H. Fan, “Coset Ensemble Decoder for Quantum Error Correction with Algorithm-Hardware Co-Design,” in Proc. of IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2026. (acceptance rate 19.0%)

105. [ASP-DAC] S. Liang, J. Xu, Y. Lu, H. Chen, B. Yuan and H. Fan, “Hardware-Efficient Union-Find Decoder Towards Scalable Topological Quantum Codes,” in Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2026.

104. [MICRO] Y. Gong, L. Huang, H. Chang, R. Liang, C. Yang, Z. Tang, J. Hu and B. Yuan, “Crane: Inter-Layer Scheduling Framework for DNN Inference and Training Co-Support on Tiled Architecture,” in Proc. of  IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2025. (acceptance rate 21.5%)

103. [CVPR] C. Yang, Y. Sui, J. Xiao, L. Huang, Y. Gong, C. Li, J. Yan, Y. Bai, P. Sadayappan, X. Hu and B. Yuan, “TopV: Compatible Token Pruning with Inference Time Optimization for Fast and Low-Memory Multimodal Vision Language Model,” in Proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2025. (acceptance rate 22.1%)

102. [CVPR] J. Xiao, S. Sang, T. Zhi, J. Liu, Q. Yan, L. Luo and B. Yuan, “COAP: Memory-Efficient Training with Correlation-Aware Gradient Projection,” in Proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2025. (acceptance rate 22.1%)

101. [NeurIPS] Y. Sui, Y. Li, A. Kag, Y. Idelbayev, J. Cao, J. Hu, D. Sagar, B. Yuan, S. Tulyakov and J. Ren, “BitsFusion: 1.99 bits Weight Quantization of Diffusion Model,” in Proc. of Neural Information Processing Systems Conference (NeurIPS), Dec. 2024. (acceptance rate 25.8%)

100. [EMNLP] C. Yang, Y. Sui, J. Xiao, L. Huang, Y. Gong, Y. Duan, W. Jia, M. Yin, Y. Cheng and B. Yuan, “MoE-I2: Compressing Mixture of Experts Models through Inter-Expert Pruning and Intra-Expert Low-Rank Decomposition,” in Proc. of Empirical Methods in Natural Language Processing (EMNLP), Nov. 2024. (acceptance rate 23%)

99. [ECCV] H. Phan, J. Xiao, Y. Sui, T. Zhang, Z. Tang, C. Shi, Y. Wang, Y. Chen and B. Yuan, “Clean & Compact: Efficient Data-Free Backdoor Defense with Model Compactness,” in Proc. of European Conference on Computer Vision (ECCV), Sep. 2024. (acceptance rate 27.9%)

98. [ICCAD] D. Fang, H. Hu, W. Li, B. Yuan and J. Hu, “SysMix: Mixed-Size Placement for Systolic-Array-Based Hierarchical Designs,” in Proc. of  IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2024.

97. [DAC] L. Huang, C. Yang, Y. Gong, Y. Sui, X. Zang, A. Goeckner, Q. Zhu and B. Yuan, “Algorithm and Hardware Co-Design for Energy-Efficient Neural SLAMram,” in Proc. of IEEE/ACM Design Automation Conference (DAC), June 2024.

96. [MobiCom] T, Zhang, H. Phan, Z. Tang, C. Shi, Y. Wang, B. Yuan and Y. Chen, “Inaudible Backdoor Attack via Stealthy Frequency Trigger Injection in Audio Spectrogram,” in Proc. of ACM Intl. Conf. On Mobile Computing And Networking (MobiCom),  Nov 2024. (acceptance rate 23.1%)

95. [DATE] J. Song, R. Liang, Y. Gong, B. Yuan and J. Hu, “DiMO-Sparse: Differentiable Modeling and Optimization of Sparse CNN Dataflow and Hardware Architecture,” in Proc. of IEEE/ACM Design, Automation and Test in Europe Conference (DATE), March 2024.

94. [HPCA] L. Huang, Y. Gong, Y. Sui, X. Zang and B. Yuan, “MOPED: Efficient Motion Planning Engine with Flexible Dimension Support,” in Proc. of IEEE Intl. Symp. on High-Performance Comp. Arch. (HPCA), March 2024. (acceptance rate 18.3%)

93. [NeurIPS] X. Zang, M. Yin, J. Xiao, S. Zonouz, and B. Yuan “GraphMP: Graph Neural Network-based Motion Planning with Efficient Graph Search,” in Proc. of Neural Information Processing Systems Conference (NeurIPS), Dec. 2024. (acceptance rate 26%)

92. [ICCAD] H. Hu, D. Fang, W. Li, B. Yuan and J. Hu, “Systolic Array Placement on FPGAs,” in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2023.

91. [ICCAD] Y. Sui, M. Zhu, L. Huang, C. Wu, and B. Yuan, “In-Sensor Radio Frequency Computing for Energy-Efficient Intelligent Radar,” in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2023.

90. [IROS] W. Zhang, X. Zang, L. Huang, Y. Sui, J. Yu, Y. Chen and B. Yuan, “DynGMP: Graph Neural Network-based Motion Planning in Unpredictable Dynamic Environments”, in Proc. of IEEE/RSJ Intl. Conf. on Intelligent Robots and Systems (IROS), Oct. 2023.

89. [ICCCN] T. Zhao, Z. Tang, T. Zhang, H. Phan, Y. Wang, C. Shi, B. Yuan and Y. Chen, “Stealthy Backdoor Attack on RF Signal Classification”, in Proc. of Intl. Conf. on Computer Communications and Networks (ICCCN), July 2023.

88. [ICML] J. Xiao, M. Yin, Y. Gong, X. Zang, J. Ren and B. Yuan, “COMCAT: Efficient Compression and Customization of Attention-based Visual Models”, in Proc. of Intl Conf. on Machine Learning (ICML), July 2023. (acceptance rate 27.9%)

87. [MMSys] Z. Tang, H. Phan, X. Feng, B. Yuan, Y. Liu, S. Wei, “Security-Preserving Live 3D Video Surveillance”, in Proc. of ACM Multimedia Systems (MMSys), June 2023.

86. [ISCA] Gong, M. Yin, L. Huang, J. Xiao, Y. Sui, C. Deng, and B. Yuan, “ETTE: Efficient Tensor-Train-based Computing Engine for Deep Neural Networks”, in Proc. of IEEE/ACM Intl. Symp. on Computer Architecture (ISCA), June 2023. (acceptance rate 21.2%)

85. [CVPR] H Liu, Y. Wu, S. Zhai, B. Yuan, N. Zhang, “RIATIG: Reliable and Imperceptible Adversarial Text-to-Image Generation with Natural Prompts”, in Proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2023. (acceptance rate 25.7%)

84. [DAC] J. Wang, Y. Wu, H. Liu, B. Yuan, R. Chamberlain and N. Zhang, “IP Protection in Tiny ML”, in Proc. of IEEE/ACM Design Automation Conference (DAC), July, 2023.

83. [DAC] A. Sridharan, F. Zhang, Y. Sui, B. Yuan and D. Fan, “DSPIMM: A Fully Digital SParse In-Memory Matrix Vector Multiplier for Communication Applications”, in Proc. of IEEE/ACM Design Automation Conference (DAC), July, 2023.

82. [AAAI] M. Yin, B. Uzkent, Y. Shen, H. Jin and B. Yuan, "GOHSP: A Unified Framework of Graph and Optimization-based Heterogeneous Structured Pruning for Vision Transformer", in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2023. (acceptance rate 19.6%)

81. [AAAI]  H. Phan, M. Yin, Y. Sui, B. Yuan and S. Zonouz, "CSTAR: Towards Compact and Structured Deep Neural Networks with Adversarial Robustness", in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2023. (acceptance rate 19.6%)

80. [AAAI]  J. Xiao, C. Zhang, Y. Gong, M. Yin, Y. Sui, L. Xiang, D. Tao and B. Yuan, "HALOC: Hardware-Aware Automatic Low-Rank Compression for Compact Neural Networks", in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2023. (acceptance rate 19.6%)

79. [PPoPP] L. Xiang*, M. Yin*, C. Zhang, A. Sukumaran-Rajam, P. Sadayappan, B. Yuan and D. Tao, "TDC: Towards Extremely Efficient CNNs on GPUs via Hardware-Aware Tucker Decomposition", in Proc. of Principles and Practice of Parallel Programming (PPoPP), Feb. 2023. (acceptance rate 23.6%)

78. [Asilomar] L. Huang, X. Zang, Y. Gong, B. Zhang and B. Yuan, “VLSI Hardware Architecture of Neural A* Path Planner,” in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (ASILOMAR), Nov. 2022.

77. [ICCAD] R. Liang, J. Song, B. Yuan and J. Hu, “Deep Learning Toolkit-Accelerated Analytical Co-optimization of CNN Hardware and Dataflow,” in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2022.

76. [ICCAD] L. Huang, X. Zang, Y. Gong and B. Yuan, “Hardware Architecture of Graph Neural Network-enabled Motion Planner,” in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2022.

75. [MobiCom] C. Shi, T. Zhang, Z. Li, H. Phan, T. Zhao, Y. Wang, J. Liu, B. Yuan and Y. Chen, “Audio-domain Position-independent Backdoor Attack via Unnoticeable Triggers,” in Proc. of ACM Intl. Conf. on Mobile Computing and Networking (MobiCom), Oct. 2022. (acceptance rate 18.38%)

74. [ECCV] H. Phan, C. Shi, Y. Xie, T. Zhang, Z. Li, T. Zhao, J. Liu, Y. Wang, Y. Chen and B. Yuan, “RIBAC: Towards Robust and Imperceptible Backdoor Attack against Compact DNN,” in Proc. of European Conference on Computer Vision (ECCV), Oct. 2022. (acceptance rate 28.43%)

73. [IROS] X. Zang, M. Yin, L. Huang, J. Yu, S. Zonouz and B. Yuan, “Robot Motion Planning as Video Prediction: A Spatio-Temporal Neural Network-based Motion Planner,” in Proc. of IEEE/RSJ Intl. Conf. on Intelligent Robots and Systems (IROS), Oct. 2022.

72. [GLSVLSI] L. Huang, X. Zang, Y. Gong, C. Deng, J. Yi and B. Yuan, “IMG-SMP: Algorithm and Hardware Co-Design for Real-time Energy-efficient Neural Motion Planning,” in Proc. of ACM Great Lakes VLSI Symposium (GLSVLSI), June 2022. 

71. [MMSys] M. Ye, Z. Tang, H. Phan, Y. Xie, B. Yuan and S. Wei, “Visual Privacy Protection in Mobile Image Recognition Using Protective Perturbation,” in Proc. of ACM Multimedia Systems Conference (MMSys), June 2022.

70. [CVPR] Y. Miao, Y. Sui, W. Yang, X. Zang, Y. Gong and B. Yuan, “HODEC: Towards Efficient High-Order Decomposed Convolutional Neural Networks,” in Proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2022. (acceptance rate 25.33%)

69. [ICASSP] H. Phan, Y. Xie, J. Liu, Y. Chen and B. Yuan, “Invisible and Efficient Backdoor Attacks for Compressed Deep Neural Networks,” in Proc. of  IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May. 2022.

68. [AAAI] M. Yin, H. Phan, X. Zang, S. Liao and B. Yuan, “BATUDE: Budget-Aware Neural Network Compression Based on Tucker Decomposition,” in Proc. of  AAAI Conference on Artificial Intelligence (AAAI), Feb. 2022. (acceptance rate 15.0%)

67. [ISPD] D. Fang, B. Zhang, H. Hu, W. Li, B. Yuan and J. Hu, “Global Placement Exploiting Soft 2D Regularity,” in Proc. of  ACM International Symposium on Physical Design, March 2022.

66. [NeurIPS] Y. Sui, Y. Xie, M. Yin, H. Phan, S. Zonouz and B. Yuan, “CHIP: CHannel Independence-based Pruning for Compact Neural Networks,” in Proc. of Neural Information Processing Systems Conference (NeurIPS), Dec. 2021. (acceptance rate 26%)

65. [CCS]  Z. Li, C. Shi, T. Zhang, Y. Xie, J. Liu, B. Yuan and Y. Chen, “Robust Detection of Machine-induced Audio Attacks in Intelligent Audio Systems with Microphone Array,” in Proc. of ACM Conf. on Computer and Communications Security (CCS), Nov. 2021.

64. [ICCAD] B. Zhang*, Y. Sui*, L. Huang, S. Liao, C. Deng and B. Yuan, “Algorithm and Hardware Co-design for Deep Learning-powered Channel Decoder: A Case Study”, in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2021. 

63. [MM] X. Fang, Y. Xie, M. Ye, Z. Tang, B. Yuan and S. Wei, “Fake Gradient: A Security and Privacy Protection Framework for DNN-based Image Classification,” in Proc. of ACM Multimedia 2020 Conference (MM), Oct. 2021.

62. [ASILOMAR] L. Huang, C. Deng, S. Ibrahim, X. Fu and B. Yuan, “VLSI Hardware Architecture of Stochastic Low-rank Tensor Decomposition,” in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (ASILOMAR), 2021. 

61. [IJCAI] Z. Xiao, Y Xie, J. Chen and B. Yuan, "Graph Universal Adversarial Attacks: A Few Bad Actors Ruin Graph Learning Models,"  in Proc. of International Joint Conferences on Artificial Intelligence (IJCAI), Aug. 2021. (acceptance rate 13.9%).

60. [ISCA] C. Deng, Y. Sui, S. Liao, X. Qian, and B. Yuan, “GoSPA: An Energy-efficient High-performance Globally Optimized SParse Convolutional Neural Network Accelerator,” in Proc. of ACM Intl. Symp. on Computer Architecture (ISCA), June 2021. (acceptance rate 18.7%).

59. [CVPR] Y. Miao, S. Liao, X. Liu, X. Wang and B. Yuan, "Towards Extremely Compact RNNs for Video Recognition with Fully Decomposed Hierarchical Tucker Structure", in Proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2021. (acceptance rate 22.0%).

58. [CVPR] Y. Miao, Y. Sui, S. Liao and B. Yuan, “Towards Efficient Tensor Decomposition-based DNN Model Compression with Optimization Framework”, in Proc. of IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), June 2021. (acceptance rate 22.0%).

57. [AAAI]  Y. Xie, Z. Li, C. Shi, J. Liu, Y. Chen and B. Yuan, “Enabling Fast and Universal Audio Adversarial Attack Using Generative Model”,  in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2021. (acceptance rate 21.0%).

56. [AAAI] S. Liao, C. Deng, M. Yin and B. Yuan, “Doubly Residual Neural Decoder: Towards Low-Complexity High-Performance Channel Decoding”, in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2021. (acceptance rate 21.0%).

55. [FPT] H. Kong, L. Feng, C. Deng, B. Yuan and J. Hu,“How Much Does Regularity Help FPGA Placement?” in Proc. of Intl. Conf. on Field Programmable Technology (FPT), Dec. 2020.

54. [IJCAI Workshop] M. Yin, S. Liao, X. Liu, X. Wang and B. Yuan, “Compressing Recurrent Neural Networks Using Hierarchical Tucker Tensor Decomposition,” International Joint Conferences on Artificial Intelligence (IJCAI) workshop, 

53.  [ASILOMAR] C. Deng, Y. Gong, F. Han, S. Liao, J. Yi and B. Yuan,  “VLSI Hardware Architecture for Gaussian Process,” in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (ASILOMAR). 

52.  [ASILOMAR] S. Liao, C. Deng, Y. Xie, L. Liu and B. Yuan,,  “Low-complexity Neural Network-based MIMO Detector using Permuted Diagonal Matrix,” in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (ASILOMAR). 

51.  [MM] T. Zhang, X. Feng, Y. Xie, H. Phan, T. Guo, B. Yuan and S. Wei, “VVSec: Securing Volumetric Video Streaming via Benign Use of Adversarial Perturbation,” in Proc. of ACM Multimedia Conf. (MM), Oct. 2020. 

50. [ICASSP] Y. Xie, Z. Li, C. Shi, J. Liu, Y. Chen and B. Yuan, “Real-time, Universal, and Robust Adversarial Attacks against Speaker Recognition Systems,” in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2020.

49. [ICASSP] X. Hu, C. Deng, and B. Yuan, “Reduced-complexity Singular Value Decomposition for Tucker Decomposition: Algorithm and Hardware,” in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2020. 

48.  [HotMobile] Z. Li, C. Shi, Y. Xie, J. Liu, B. Yuan and Y. Chen, “Practical Adversarial Attacks Against Speaker Recognition Systems,”, in Proc. of Intl. Workshop on Mobile Computing Systems and Applications (HotMobile), March 2020.

47. [AAAI] H. Phan, Y. Xie, S. Liao, J. Chen and B. Yuan, “CAG: A Real-time Low-cost Enhanced-robustness High-transferability Content-aware Adversarial Attack Generator,” in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2020. (acceptance rate 20.6%).

46. [AAAI] S. Liao, J. Chen, Y. Wang, Q. Qiu and B. Yuan, “Embedding Compression with Isotropic Iterative Quantization,” in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2020. (acceptance rate 20.6%).

45. [ICCAD] B. Li, C. Deng, J. Yang, D. J. Lilja, B. Yuan and D. H. Du, “HAML-SSD: A Hardware Accelerated Hotness-Aware Machine Learning based SSD Management,” in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2019.

44. [ICCAD] C. Deng, M. Yin, X. Liu, X. Wang and B. Yuan, “High-performance Hardware Architecture for Tensor Singular Value Decomposition,” in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), Nov. 2019.

43. [MICCAI Workshop] F. Wang, C. Deng, B. Yuan and C. Chen, “Hardware Acceleration of Persistent Homology Computation,” in Proc. of Intl. Conf. on Medical Image Comp. and Computer Assisted Intervention (MICCAI) Workshop, Oct. 2019.

42. [SIPS] S. Liao, C. Deng, L. Liu and B. Yuan, “Structured Neural Network with Low Complexity for MIMO Detection,” in Proc. of IEEE Workshop on Signal Processing Systems (SIPS), Oct. 2019. (Invited)

41. [ISCA] C. Deng, F. Sun, X. Qian, J. Lin, Z. Wang and B. Yuan, “TIE: Energy-efficient Tensor Train-based Inference Engine for Deep Neural Network,” in Proc. of ACM Intl. Symp. on Computer Architecture (ISCA), June 2019. (acceptance rate 16.9%).

40. [ICASSP] S. Liao, A. Samiee, C. Deng, Y. Bai and B. Yuan, “Compressing Deep Neural Networks using Toeplitz Matrix: Algorithm Design and FPGA Implementation,” in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2019.

39. [ICASSP] C. Deng, S. Liao and B. Yuan, “Reduced-complexity Deep Neural Network-aided Channel Decoder: A Case Study for BCH Decoder,” in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2019.

38. [AAAI] S. Liao, Z. Li, L. Zhao, Q. Qiu, Y. Wang and B. Yuan, "CircConv: A Structured Convolution with Low Complexity," in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Jan.2019.  (acceptance rate 16.7%).

37. [ASILOMAR] Y. Xie, C. Deng, S. Liao and B. Yuan, “Area-efficient K-Nearest Neighbors Design using Stochastic Computing,” in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (ASILOMAR), Nov. 2018..

36. [MICRO]  C. Deng*, S. Liao*, Y. Xie, K. K. Parhi, X. Qian and B. Yuan, “PermDNN: Efficient Compressed Deep Neural Network Architecture with Permuted Diagonal Matrices,” in Proc. of IEEE/ACM Intl. Symp. on Microarchitecture (MICRO), Oct. 2018 (acceptance rate 18.6%).

35. [ICASSP]  K. Ahmed, B. Yuan and Myung J. Lee, “High-Accuracy Stochastic Computing-based FIR Filter Design,” in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), May 2018.

34. [ASP-DAC] S. Liao, L. Zhou, X. Di, B. Yuan and J. Xiong, “Large-scale Short-term Urban Taxi Demand Forecasting Using Deep Learning,” in Proc of. IEEE/ACM Asia and South Pacific Design Auto. Conf. (ASP-DAC), Jan. 2018. (Invited)

33. [AAAI] Y. Wang, C. Ding, G. Yuan, S. Liao, Z. Li, X. Ma, B. Yuan, X. Qian, J. Tang, Q. Qiu, and X. Lin, “Towards Ultra-high Performance and Energy Efficiency of Deep Learning Systems: An Algorithm-Hardware Co-optimization Framework,” in Proc. of AAAI Conference on Artificial Intelligence (AAAI), Feb. 2018  (acceptance rate 24.6%).

32. [FPGA] S. Wang, Z. Li, C. Ding, B. Yuan, Q. Qiu, Y. Wang and Y. Liang, “C-LSTM: Enabling Efficient LSTM using Structured Compression Techniques on FPGAs”, in Proc of. ACM/SIGDA Intl. Symp. on Field-Programmable Gate Arrays (FPGA), Feb. 2018.

31.[ ICCD] B. Li, Y. Qin, B. Yuan and D. Lilja, “Neural Network Classifiers using Stochastic Computing with a Hardware-Oriented Approximate Activation Function, “ in Proc. of IEEE Intl. Conf. on Computer Design (ICCD), Oct. 2017.

30. [MICRO] C. Ding*, S. Liao*, Y. Wang*, Z. Li, Y. Bai, Y. Zhuo, C. Wang, X. Qian, N. Liu, G. Yuan, X. Ma, Y. Zhang, X. Lin, J. Tang, Q. Qiu and B. Yuan, "CirCNN: Accelerating and Compressing Deep Neural Networks using Block-Circulant Weight Matrices," in Proc. of  IEEE/ACM Intl. Symp. on Microarchitecture (MICRO), 2017  (acceptance rate 18.6%).

29. [ICCAD] S. Liao*, Z. Li*, X. Lin, Q. Qiu, Y. Wang and B. Yuan, "Energy-Efficient High-Performance Highly-Compressed Deep Neural Network Design using Block-Circulant Matrices," in Proc. of IEEE/ACM Intl. Conf. on Computer Aided Design (ICCAD), 2017

28. [ICML] L. Zhao*, S. Liao* , Y. Wang, Z. Li, J. Tang and B. Yuan, "Theoretical Properties for Neural Networks with Weight Matrices of Low Displacement Rank," in Proc. of International Conference on Machine Learning (ICML), 2017 (acceptance rate 25.4%).

27. [GLSVLSI] Z. Yuan, J. Li, Z. Li, C. Ding, A. Ren, B. Yuan, Q. Qiu, J. Draper and Y. Wang, "Softmax Regression Design for Stochastic Computing Based Deep Convolutional Neural Networks," in Proc. of ACM Great Lake Symp. on VLSI (GLSVLSI), 2017.

26. [DATE] Z. Li, A. Ren, J. Li, Q. Qiu, B. Yuan and Y. Wang, "Structural Design Optimization for Deep Convolutional Neural Networks using Stochastic Computing," in Proc. of IEEE/ACM Conf. on Design, Automation and Test in Europe (DATE), 2017.

25. [ASPLOS] A. Ren, Z. Li, C. Ding, Q. Qiu, Y. Wang, J. Li , X. Qian, and B. Yuan, "SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing," in Proc. of ACM Intl. Conf. on Architectural Support for Programming Languages and Operating System (ASPLOS), 2017 (acceptance rate 17.4%).

24. [ASP-DAC] J. Li, A. Ren, Z. Li, C. Ding, B. Yuan, Q. Qiu and Y. Wang, "Towards Acceleration of Deep Convolutional Neural Networks using Stochastic Computing," in Proc. of IEEE/ACM Asia and South Pacific Design Auto. Conf. (ASP-DAC), 2017.

23. [SIPS] D. Cannisi and B. Yuan, “Design Space Exploration for K-Nearest Neighbors Classification using Stochastic Computing,” in Proc. of IEEE Workshop on Signal Processing Systems (SIPS), Oct. 2016. (Invited)

22. [ICCD] Z. Li, A. Ren, J. Li, Q. Qiu, Y. Wang and B. Yuan, "DSCNN: Hardware-Oriented Optimization for Stochastic Computing Based Deep Convolutional Neural Networks," in Proc. of IEEE Intl. Conf. on Computer Design (ICCD), Oct. 2016. (Invited)

21. [ICRC] A. Ren, Z. Li, Y. Wang, Q. Qiu and B. Yuan, "Designing Reconfigurable Large-scale Deep Learning Systems using Stochastic Computing," in Proc. of IEEE Intl. Conf. on Rebooting Computing (ICRC), Oct. 2016.

20. [SOCC] B. Yuan, "Efficient Hardware Architecture of Softmax Layer in Deep Neural Network," in Proc. of IEEE Intl. System-on-chip Conference (SOCC), Sep. 2016. (Invited)

19. [SOCC] R. Cai, A. Ren, Y. Wang, S. Soundarajan, Q. Qiu, B. Yuan and P. Bogdan, "A Low-Computation-Complexity, Energy-Efficient, and High-Performance Linear Program Solver Using Memristor Crossbars," in Proc. of IEEE Intl. System-on-chip Conference (SOCC), Sep. 2016. (Invited)

18. [SOCC] A. Ren, Y. Wang and B. Yuan, "Design of High-speed Low-power Polar BP Decoder Using Emerging Technologies," in Proc. of IEEE Intl. System-on-chip Conference (SOCC), Sep. 2016. (Invited)

17. [ISVLSI]  B. Yuan and Y. Wang, "High-Accuracy FIR Filter Design using Stochastic Computing,"in Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2016. (Invited)

16. [ISVLSI] R. Cai, A. Ren, Y. Wang and B. Yuan, "Memristor-Based Discrete Fourier Transform for Improving Performance and Power Efficiency", in Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2016.

15. [ISCAS] B. Yuan, Y. Wang and Z. Wang, "Area-Efficient Scaling-free DFT/FFT Design using Stochastic Computing, " in Proc. of IEEE Int. Symp. Circuits Syst. (ISCAS), May 2016. (Invited for TCAS-II journal)

14. [GLSVLSI] B. Yuan, Y. Wang and Z. Wang, "Area-Efficient Error-Resilient Discrete Fourier Transformation Design using Stochastic Computing," in Proc. of ACM 26th Greak Lakes VLSI Symposium (GLSVLSI), pp. 33-38, May 2016.

13. [ISCAS] B. Yuan and K. K. Parhi, "Belief Propagation Decoding of Polar Codes using Stochastic Computing," in Proc. of IEEE Int. Symp. Circuits Syst. (ISCAS), May 2016. (Invited)

12. [ICASSP] B. Yuan, C. Zhang and Z. Wang, "Design Space Exploration for Hardware-Efficient Stochastic Computing: A Case Study on Discrete Cosine Transformation," in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), March 2016.

11. [GLSVLSI] B. Yuan and K.K. Parhi, “Reduced-latency LLR-based SC List Decoder for Polar Codes,” in Proc. of ACM 25th Great Lakes VLSI Symposium (GLSVLSI), pp 107-110, May 2015.

10. [ISCAS] B. Yuan and K.K. Parhi, “Succesive Cancellation Decoding of Polar Codes using Stochastic Computing,” in Proc. of IEEE Int. Symp. Circuits Syst. (ISCAS), pp 3040-3043, May 2015.

9. [ASILOMAR]  C. Zhang, Z. Wang, X. You and B. Yuan,"Efficient Adaptive List Successive Cancellation Decoder for Polar Codes,"in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (Asilomar), pp 126-130, Nov. 2014.

8. [ASILOMAR] B. Yuan and K.K. Parhi, “Algorithm and Architecture for Hybrid Decoding of Polar codes,” in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (Asilomar), pp 2050-2053, Nov. 2014.

7. [ASILOMAR] B. Yuan and K.K. Parh, "Succssive Cancellation List Polar Decoder using Log-likelihood Ratios," in Proc. of IEEE Asilomar Conf. on Signal, Systems and Computers (Asilomar), pp 548-552, Nov. 2014.

6. [ISCAS] B. Yuan and K.K. Parhi, “Architectures for Polar BP Decoders using Folding,” in Proc. of IEEE Int. Symp. Circuits Syst.(ISCAS), pp 205-208, June 2014.

5. [ICASSP] B. Yuan and K.K. Parhi, “Architecture Optimizations for BP Polar Decoders,” in Proc. of IEEE Int. Conf. on Acoustics, Speech and Signal Processing (ICASSP), pp. 2654-2658, May 2013

4. [ICC] C. Zhang, B. Yuan, and K.K. Parhi, “Reduced-Latency SC Polar Decoder Architectures,” in Proc. of IEEE Int. Conf. Communications (ICC), pp. 3471-3475, June 2012.

3. [SIPS] B. Yuan, L. Li and Z. Wang, “High-speed Area-efficient Versatile Reed-Solomon Decoder Design for Multi-mode Applications,” in Proc. IEEE Workshop on Signal Processing Systems (SIPS), pp 179-184, Oct. 2009.

2. [ASICON] B. Yuan, J. Sha, L. Li and Z. Wang, “High-speed Reed-Solomon Errors-and-erasures Decoder Design with Burst Error Correcting,” in Proc. IEEE Int. Conf. on ASIC (ASICON), pp. 484-487, Oct. 2009.

1. [ISCAS] B. Yuan, L. Li, J. Sha, and Z. Wang, “Area-efficient Reed-Solomon Decoder Design for 10-100 Gb/s Applications,” in Proc. IEEE Int. Symp. Circuits Syst.(ISCAS), pp. 2681-2684, May. 2009.