Reference: http://code.google.com/p/milestone-overclock/ (Thanks Tiago Sousa)
Objective:
1. Make /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq to accept higher frequency.
__cpufreq_set_policy drivers/cpufreq/cpufreq.c
cpufreq_driver->verify
omap_verify_speed() arch/arm/plat-omap/cpu-omap.c
cpufreq_frequency_table_verify() drivers/cpufreq/freq_table.c
2. Make omap3_mpu_rate_table reflect new frequency.
One of the way:
Changing /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies (struct freq_attr cpufreq_freq_attr_scaling_available_freqs in drivers/cpufreq/freq_table.c)
arch/arm/plat-omap/cpu-omap.c for omap_cpu_init() omap_verify_speed() omap_target()
arch/arm/plat-omap/clock.c clk_init_cpufreq_table
arch/arm/mach-omap2/clock34xx.c omap2_clk_init_cpufreq_table
cpu-omap.c: omap_target()
omap-pm-srf.c: omap_pm_cpu_set_freq() -> resource_request
see resource34xx.h for the associated ops. (Mostly in resource34xx.c)
set_freq() -> convert target_level to opp level ->
resource request vdd1_opp -> set_opp() -> get value from mpu_opps ->
program_opp()
The key is the conversion between target_level <-> vdd1_opp and vdd1_opp <-> mpu_opps.
TRM
4.7.8.1 Processor Clock Configurations (p.365)
Reference: https://github.com/coolbho3k/Xoom-OC
git diff 2a65ed..1615a6
board-stingray-power.c
static struct regulator_init_data cpcap_regulator[CPCAP_NUM_REGULATORS]
CPCAP_SW2
- .max_uV = 1200000,
+ .max_uV = 1300000,
CPCAP_SW4
- .max_uV = 1200000,
+ .max_uV = 1300000,
max8649_regulator_init_data
- .max_uV = 1100000,
+ .max_uV = 1250000,
##
drivers/regulator/core.c:
int regulator_set_voltage(struct regulator *regulator, int min_uV, int max_uV)
regulator->rdev->constraints
cpu-tegra.c
static struct cpufreq_frequency_table freq_table[]
##
cpufreq
tegra2_clocks.c
static void tegra2_pllx_clk_init(struct clk *c)
if (tegra_sku_id() == 7)
- c->max_rate = 1500000000;
+ c->max_rate = 1600000000;
static struct clk_pll_freq_table tegra_pll_x_freq_table[]
static struct clk tegra_pll_x
static struct clk tegra_clk_cclk
static struct clk tegra_clk_virtual_cpu
##
clock.c:tegra_get_clock_by_name()
tegra2_dvfs.c
static const int cpu_millivolts[MAX_DVFS_FREQS]
static struct dvfs_rail tegra2_dvfs_rail_vdd_cpu
static struct dvfs_rail tegra2_dvfs_rail_vdd_core
static struct dvfs_rail tegra2_dvfs_rail_vdd_aon
static struct dvfs dvfs_init[]
##
clk->dvfs
dvfs.dvfs_rail
dvfs.millivolts
dvfs.dvfs_rail.relationships_from (for aon)
dvfs.dvfs_rail.relationships_to
clock.c:clk_set_rate() -> dvfs.c:tegra_dvfs_set_rate()