Sensors Directorate, Air Force Research Laboratory (AFRL), OH
High Temperature Electronics
Enabling electronics at a high-temperature (HT) is critical for hypersonic vehicles, space exploration, electric vehicles, gas turbines, gas/oil drilling, geothermal surveying, and energy-dense systems. These HT applications currently use transducers that can withstand very high temperature. Electronics for these HT applications, however, are made with conventional Si-based technology (compatible for temperatures up to 200 oC), therefore, require thermal management solutions in terms of air or liquid cooling with adequate packaging for keeping the electronics at a lower temperature – all these introduce additional overhead to the HT system.
A. E. Islam, N. P. Sepelak, A. T. Miesle, H. Lee, M. Snure, S. Nikodemski, D. E. Walker, N. C. Miller, M. Grupen, K. D. Leedy, K. J. Liddy, A. Crespo, G. R. Hughes, W. Zhu, B. Poling, S. Tetlak, K. D. Chabak, and A. J. Green, "Effect of high temperature on the performance of AlGaN/GaN T-gate high-electron mobility transistors with ~140 nm gate length", IEEE Transactions on Electron Devices, 71 (3), pp. 1805-1811, 2024, doi: 10.1109/TED.2024.3353694. Link
N. S. Al-Mamun, A. Islam, N. Glavin, A. Haque, D. E. Wolfe, F. Ren, S. Pearton, "Synergistic effects of heating and biasing of AlGaN/GaN high electron mobility transistors: An in-situ transmission electron microscopy study," Microelectronics Reliability, vol. 160, 2024, 115470. Link
M. A. J. Rasel, D. Zhang, A. Chen, M. Thomas, S. D. House, W. Kuo, J. Watt, A. Islam, N. Glavin, M. Smyth, A. Haque, D. E. Wolfe, S. J. Pearton, "Temperature-induced degradation of GaN HEMT: An in situ heating study," J. Vac. Sci. Technol. B, 2024; 42 (3): 032209. Link
N. C. Miller, A. Brown, M. Eilliot, R. Gilbert, D. T. Davis, A. E. Islam, D. Walker, G. Hughes, K. Liddy, K. D. Chabak, "An ASM-HEMT for Large-Signal Modeling of GaN HEMTs in High-Temperature Applications," in IEEE Journal of the Electron Devices Society, vol. 11, pp. 531-538, 2023, Link
A. E. Islam, N. P. Sepelak, K. J. Liddy, R. Kahler, D. M. Dryden, J. Williams, H. Lee, K. Gann, A. Popp, K. D. Leedy, N. S. Hendricks, J. L. Brown, E. R. Heller, W. Wang, W. Zhu, M. O. Thompson, K. D. Chabak, and A. J. Green, "500 oC operation of β-Ga2O3 field-effect transistors", Applied Physics Letters 121 (24), 243501. Link
Successful integration of dielectrics into a transistor process flow with negligible defect density has historically been the key for wide scale application of electronic devices. Dielectrics are needed not only as gate insulators for operation of metal oxide semiconductor field-effect transistors (MOSFETs), but also needed for passivation of metal semiconductor FET (MESFET) and high-electron mobility transistor (HEMT; which is a different form of MESFET). The presence of defects either in the bulk or interface of these dielectrics critically affect the performance of transistors. Transistors for RF operation uses all the above transistor configurations. The semiconducting channel in these transistors are generally made with III-V (like GaAs, GaN, AlGaN) or III-O (like Ga2O3, AlGaO) materials. These materials do not have a native dielectric like Si does in form of SiO2, therefore, have an unoptimized dielectric/semiconductor interface even after 40 years of their introduction into RF electronics. In addition, formation of novel dielectrics on these materials poses additional challenges in terms of bulk and interface defects, carrier injection into dielectric, which lead to instability in device operation. We work on the integration of classical and novel dielectrics in III-V and III-O based semiconductors. These are especially important for high power RF applications that require use of ultra-wide bandgap (UWBG) materials like III-N and III-O and require high voltage application across the dielectric.
A. Gilankar, A. E. Islam, M. R. McCartney, A. Katta, N. Das, D. J. Smith, and N. K. Kalarickal, Three-step field-plated β-Ga2O3 Schottky barrier diodes and heterojunction diodes with sub-1 V turn-on and kilovolt-class breakdown," Appl. Phys. Express, 17, 046501, 2024. Link
A. Miesle, A.E. Islam, E. Shin, G. Subramanyam, K.D. Leedy, S. Ganguli, D.M. Dryden, K.J. Liddy, K.D. Chabak, and A.J. Green, "High breakdown electric field in BaxSr1-xTiO3/SiO2 dielectric stack formed on (010) β-Ga2O3 substrates," Device Research Conference, 2023. Link
A. E. Islam, C. Zhang, K. DeLello, D. A. Muller, K. D. Leedy, S. Ganguli, N. A. Moser, R. Kahler, J. C. Williams, D. M. Dryden, S. Tetlak, K. J. Liddy, A. J. Green, and K. D. Chabak, "Defect engineering at the Al2O3/(010) βGa2O3 interface via surface treatments and forming gas post-deposition anneals", IEEE Transactions on Electron Devices, vol. 69, no. 10, pp. 5656-5663, Oct. 2022; DOI: 10.1109/TED.2022.3200643. Link
A.E. Islam, A. Miesle, M. Dietz, K.D. Leedy, S. Ganguli, G. Subramanyam, W. Wang, N. Sepelak, D. Dryden, S. Tetlak, K.J. Liddy, A.J. Green and K.D. Chabak, "Thermal stability of ALD-grown SiO2 and Al2O3 on (010) β-Ga2O3 substrates," Device Research Conference, 2022. doi: 10.1109/DRC55272.2022.9855795. Link
A.E. Islam, K.D. Leedy, N.A. Moser, S. Ganguli, K.J. Liddy, A.J. Green and K.D. Chabak, "Hysteresis-free MOSCAP made with Al2O3/(010)β-Ga2O3 interface using a combination of surface cleaning, etching and post-deposition annealing", Proceedings of IEEE DRC, 2021. doi: 10.1109/DRC52342.2021.9467169 Link
G. A. Salcedo, A. E. Islam, M. K. Dietz, S. Cheema, K. D. Leedy, K. J. Liddy, A. J. Green, W. Wang, S. Salahuddin, K. D. Chabak, J. M. Sattler, "Towards the Integration of Hf0.8Zr0.2O2-based Negative Capacitance Dielectrics on -Ga2O3 Substrates", NAECON 2021-IEEE National Aerospace and Electronics Conference, p. 7-11, 2021. PDF
Gallium Nitride Electronics
Gallium Nitride (GaN) high electron mobility transistors (HEMTs) are a critical component in the radio frequency (RF) and power electronics landscape due to their high breakdown voltage, high electron velocity saturation, and their highly conductive two-dimensional electron gas due to spontaneous and piezoelectric polarization in the crystals. GaN HEMTs continue to be integrated into the defense and commercial sectors, but there are open challenges that requires appropriate consideration.
N. C. Miller, M. Grupen, A. E. Islam, J. D. Albrecht, D. Frey, R. Young, M. Lindquist, A. J. Green, D. E. Walker, and K. D. Chabak, "Experimentally Validated Gate-Lag Simulations of AlGaN/GaN HEMTs Using Fermi Kinetics Transport," IEEE Transactions on Electron Devices, 2023, 70(2), pp. 435-442.
Gallium Oxide Electronics
Gallium Oxide has undergone rapid technological maturation since 2012, pushing it to the forefront of ultra-wide band gap semiconductor technologies. Maximizing the potential for a new semiconductor system requires a concerted effort by the community to address technical barriers which limit performance. Due to the favorable intrinsic material properties of gallium oxide, namely, critical field strength, widely tunable conductivity, mobility, and melt-based bulk growth, the major targeted application space is power electronics where high performance is expected at low cost. Currently, the β-form of Ga2O3 possesses great promise for low-loss DC and dynamic switching and for high-frequency, high-power RF operation.
S. S. Ahmed,*A. E. Islam,* D. M. Dryden, K. J. Liddy, N. S. Hendricks, N. A. Moser, K. D. Chabak, and A. J. Green, "Theoretical Power Figure-of-Merit in β -Ga2O3 Lateral Power Transistors Determined Using Physics-Based TCAD Simulation," in IEEE Transactions on Electron Devices, vol. 71, no. 9, pp. 5305-5312, Sept. 2024, doi: 10.1109/TED.2024.3436711. (*equal contribution) Link
D. M. Dryden, K. J. Liddy, A. E. Islam, J. Williams, D. E. Walker, N. S. Hendricks, N. A. Moser, A. Arias-Purdue, N. P. Sepelak, K. DeLello, K. D. Chabak, and A. J. Green, "Scaled T-Gate β-Ga2O3 MESFETs With 2.45 kV Breakdown and High Switching Figure of Merit," IEEE Electron Device Letters, 43(8), pp. 1307-1310, 2022. Link
A.J. Green, J. Speck, G. Xing, P. Moens, F. Allerstam, K. Gumaelius, T. Neyer, A. Arias-Purdue, V. Mehrotra, A. Kuramata, K. Sasaki, S. Watanabe, K. Koshi, J. Blevins, O. Bierwagen, S. Krishnamoorthy, K. Leedy, A. R. Arehart, A. T. Neal, S. Mou, S. A. Ringel, A. Kumar, A. Sharma, K. Ghosh, U. Singisetti, W. Li, K. Chabak, K. J. Liddy, A. Islam, S. Rajan, S. Graham, S. Choi, Z. Chang, M. Higashiwaki, “β-Gallium oxide power electronics”, APL Materials, 10, 029201, 2022. PDF
N. Moser, K. Liddy, A. Islam, N. Miller, K. Leedy, T. Asel, S. Mou, A. Green, K. Chabak, “Toward high voltage radio frequency devices in β-Ga2O3”, Applied Physics Letters 117 (24), 242101, 2020. PDF
Materials and Manufacturing Directorate, Air Force Research Laboratory (AFRL), OH
Human performance monitoring
Human performance biomarkers like neuropeptide Y (NPY) is observed in operando on functional graphene field-effect transistor (GFET) biosensors. Biological recognition elements (BREs) identified using biopanning with affinity to NPY are used to functionalize graphene to obtain selectivity. On working devices capable of achieving picomolar responsivity to neuropeptide Y, LC-TEM reveals translational motion, stochastic positional fluctuations due to constrained Brownian motion, and rotational dynamics of captured analyte.
A.E. Islam, R. Martineau, C. Casto, H. Kim, R. Rao, B. Maruyama, S. S. Kim, and L. F. Drummy, “Graphene-Based Electrolyte-Gated Field-Effect Transistors for Potentiometrically Sensing Neuropeptide Y in Physiologically Relevant Environments”, ACS Applied Nano Materials, 3 (6), 5088–5097, 2020. PDF
S. S. Kim*, L. Xing*, A. E. Islam , M.-S. Hsiao, Y. H. Ngo, O. Pavlyuk, R. Martineau, C. Hampton, C. Crasto, J. M Slocik, M. P. Kadakia, J. Hagen, N. K.-Loughnane, R. R. Naik, and L. F. Drummy, “In operando observation of neuropeptide capture and release on graphene FET biosensors with picomolar sensitivity”, ACS Appl. Mater. Interfaces, 2019, 10.1021/acsami.8b20498. (*equal contribution) PDF
Graphene processed with nitrocellulose is formulated into inks with viscosities ranging over 4 orders of magnitude for compatibility with a wide range of deposition methods. Following thermal treatment, the graphene/nitrocellulose films offer high electrical conductivity of ∼40 000 S/m, along with mechanical flexibility.
E. Secor*, T. Gao*, A. E. Islam , R. Rao, S. Wallace, J. Zhu, K. Putz, B. Maruyama, and M. Hersam, “Enhanced Conductivity, Adhesion and Environmental Stability of Printed Graphene Inks with Nitrocellulose”, Chemistry of Materials, 29 (5), p. 2332–2340, 2017. (*equal contribution) PDF
Defect engineering of nanomaterials
Low-dimensional (low-D) nanomaterials have attracted considerable attention to continue Moore’s law scaling in electronics and also to excel novel applications like flexible electronics, photonics, plasmonics, biological and chemical sensing, and energy harvesting. Defect engineering is critical to enable these applications. We perform defect engineering of low-D materials like carbon nanotubes (CNTs) and graphene with high precision using unique techniques, where the surface of a material is modified by a reaction with select gaseous species driven by the energy of an electron/laser beam.
A.E. Islam, M.A. Susner, J. Carpena-Núñez, T.C. Back, R. Rao, J. Jiang, R. Pachter, J.J. Boeckl, and B. Maruyama, “Defect engineering of graphene using electron-beam chemistry with radiolyzed water”, Carbon, 166, 446-455, 2020. PDF
R. Rao, A. E. Islam , P. M. Campbell, E. M. Vogel, and B. Maruyama, “In situ thermal oxidation kinetics in few layer MoS2”, 2D Materials, 4, pp. 025058, 2017. PDF
A. E. Islam , S. S. Kim, R. Rao, Y. Ngo, J. Jiang, P. Nikolaev, R. Naik, R. Pachter, J. Boeckl, and B. Maruyama,"Photo-thermal oxidation of single-layer graphene," RSC Advances, 2016, p. 42545-42553. PDF
R. Rao,* A. E. Islam ,* N. Pierce, P. Nikolaev, and B. Maruyama, "Chiral angle-dependent defect evolution in CVD-grown single-walled carbon nanotubes," Carbon, 95, 287-291, 2015. (*equal contribution) PDF
Chemical vapor deposition (CVD) is the most popular and scalable technique that has been used for synthesis of a wide range of low-dimensional materials like graphene, CNT, transition metal dichalcogenides. Our work on this topic encompasses heterogeneous catalysis, gas phase decomposition, and surface characterization - which enabled understanding and exploration of new approaches for enhancing nanomaterial synthesis.
Related Publication(s):
J. Chang, P. Nikolaev, J. Carpena-Núñez, R. Rao, K. Decker, A. E. Islam, J. Kim, M. A. Pitt, J. I. Myung, and B. Maruyama, "Efficient Closed-loop Maximization of Carbon Nanotube Growth Rate using Bayesian Optimization", Sci Rep, 10, 9040, 2020.
R. Rao, C. Pint, A. E. Islam , R. S. Weatherup, S. Hofmann, E. R. Meshot, F. Wu, C. Zhou, N. Dee, P. B. Amama, J. Carpena-Nunez, ......, D. N. Zakharov, E. A. Stach, J. Zhang, F. Wei, D. B. Geohagen, M. Terrones, B. Maruyama, S. Maruyama, Y. Li, W. W. Adams and A. J. Hart, “Carbon Nanotubes and Related Nanomaterials: Critical Advances and Challenges for Synthesis toward Mainstream Commercial Applications”, ACS Nano, 12 (12), pp 11756–11784, 2018. PDF
J. Carpena-Nunez, B. Davis, A. E. Islam , J. Brown, G. Sargent, N. Murphy, T. Back, M. R. Maschmann, and B. Maruyama, “Water-assisted, electron-beam induced activation of carbon nanotube catalyst supports for mask-less, resist-free patterning”, Carbon, 135, po. 270-277, 2018.PDF
P. Amama,* A. E. Islam ,* S. Saber, D. Huffman, and B. Maruyama, "Understanding properties of engineered catalyst supports using contact angle measurements and X-ray reflectivity," Nanoscale, 2016. DOI: 10.1039/C5NR08108D. (*equal contribution) PDF
A. E. Islam, P. Nikolaev, P. B. Amama, S. Saber, D. Zakharov, D. Huffman, M. Erford, G. Sargent, S. L. Semiatin, E. A. Stach, and B. Maruyama, "Engineering the Activity and Lifetime of Heterogeneous Catalysts for Carbon Nanotube Growth via Substrate Ion Beam Bombardment," Nano Letters, 14(9), 4997-5003, 2014. PDF
We use a numerical framework to study thermal instability in the CNT-based emitters by solving electrostatics, space-charge effect, quantum-mechanical tunneling (with FN equation as the limiting case), thermionic emission and heat flow in a self-consistent manner. Simulation compares well with the experimental results and allows study of temperature rise – the root cause of thermal instability – for the emitter in a wide range of conditions. Our analysis suggests that higher thermal conductivity and/or electrical conductivity and their reduced temperature dependence are beneficial for the field emitters, as these improve the thermal stability of the emitter by reducing temperature rise.
A. E. Islam , S. B. Fairchild, and B. Maruyama, "Thermal Instability of Field Emission Studied Using Multi-physics Simulation by Considering Space Charge Effect," SPIE Nanoscience + Nanoengineering, 9552-10, 2015. PDF
Department of Materials Science and Engineering, University of Illinois, IL
Transistors and light emitting diodes using carbon nanotubes
Single walled carbon nanotubes (SWCNTs) have excellent electronic, thermal, and mechanical properties that make them attractive for potential use in radio-frequency electronics, macroelectronic systems, and in various types of chemical and biological sensors. Device architectures that incorporate random networks or aligned arrays of SWCNTs in sub-monolayer coverages provide practical, realistic routes to these and other applications.
Light Emission in SWNT: We perform a systematic experimental and theoretical study of electroluminescence in aligned-array single wall carbon nanotubes using a simple two terminal geometry and provide insights about the underlying mechanism. Asymmetrically distributed photon emission near one of the metal contact with lower work-function is attributed to localized electron-hole recombination and exciton formation in that region. High current thresholds for electroluminescence in these devices result from quenching of excitons in regions near the metal contact.
Related Publication(s):
A. E. Islam*, X. Xie*, M. A. Wahab*, L. Ye, X. Ho, M. A. Alam, and J. A. Rogers, "Electroluminescence in Aligned-array Single-wall Carbon Nanotubes with Asymmetric Contacts", , ACS Nano, DOI: 10.1021/nn3025496, 2012. (*equal contribution) PDF
Metallic single-wall carbon nanotubes (m-SWCNTs) removal
Conventional SWCNT growth techniques yield a mixture of metallic and semiconducting SWCNTs with broad diameter distributions. On/off ratios of resultant SWCNT FETs are unacceptably low and is not suitable for electronic device applications. Removal of metallic and large diameter semiconducting SWCNTs are prerequisite for increasing on/off ratio. In this project, we use thermolithography to selectively remove metallic SWCNTs from as-grown substrates. Here, the thermolithographic patterns are created by coating a thin molecular film on the substrate with as-grown SWCNTs and then by selectively heating only the metallic SWCNTs to remove the coated films on top of metallic SWNTs. For selective heating of metallic SWCNTs, we use differential electromagnetic [Nature Comm 2014], optical [ACS Nano, 2014] responses of metallic and semiconducting SWCNTs. This differential response eases the complicated process steps that we originally proposed [Nature Nano 2013] to implement the thermolithographic process by selective heating metallic SWCNTs by passing electrical current through them.
Related Publication(s):
A. E. Islam , J. A. Rogers, and M. A. Alam, "Recent progress in obtaining semiconducting single-walled carbon nanotubes for transistor applications," Advanced Materials, 27(48), 7908-7937, 2015. PDF Selected Abstracts in Chemistry
X. Xie*, S.H. Jin*, M. A. Wahab*, A. E. Islam, C. Zhang, F. Du, E. Seabron, T. Lu, S. N. Dunham, H. I. Chen, Y. C. Tu, Z. Guo, H. U. Chung, Y. Li, Y. Liu, J. H. Lee, J. Song, Y. Huang, M. A. Alam, W. L. Wilson, J. A. Rogers, “Microwave Purification of Large-area, Horizontally Aligned Arrays of Single-Walled Carbon Nanotubes”, Nature Communications, 5, p. 5332, 2014. (*equal contribution) PDF
F. Du, J. Felts, J. Song, Y. Li, X. Xie, M. R. Rosenberger, A. E. Islam, S. H. Jin, S. N. Dunham, C. Zhang, W. L. Wilson, Y. Huang, W. P. King, and J. A. Rogers, "Laser-induced Nanoscale Thermocapillary Flow for Purification of Aligned Arrays of Single-walled Carbon Nanotubes", ACS Nano, 8(12), p. 12641-12649, 2014. PDF
X. Xie, A. E. Islam, S.H. Jin, F. Du, W. Wilson, and J. A. Rogers, "Purification of Aligned Arrays of Single Walled Carbon Nanotubes by Microwave Irradiation", MRS Fall Meeting, 2013, p. SS15.05.
S. H. Jin, S. N. Dunham, J. Song, X. Xie, J. Kim, C. Lu, A. E. Islam, F. Du, J. Kim, J. Felts, Y. Li, F. Xiong, M. A. Wahab, M. Menon, E. Cho, K. L. Grosse, D. J. Lee, H. U. Chung, E. Pop, M. A. Alam, W. P. King, Y. Huang, and J. A. Rogers, ”Using Nanoscale Thermocapillary Flows to Create Purely Semiconducting Arrays of Single Walled Carbon Nanotubes”, Nature Nanotechnology, 8(5), 347-355, 2013. PDF
M. A. Wahab, S. H. Jin, A. E. Islam, J. Kim, W.-H. Yeo, D. J. Lee, H. U. Chung, J. A. Rogers, M. A. Alam, “Electrostatic Dimension of Aligned-Array Carbon Nanotube Field Effect Transistors”, ACS Nano, 7(2), 1299-1308, 2013. PDF
Performance variations in SWCNT transistors
As-grown aligned arrays of SWCNTs have variations in diameters and local densities that depend in a complex way on the size/composition (yielding diameter variation) and placement (yielding density variation) of the SWCNT catalyst, and details of the growth conditions. Such variations lead directly to spatial non-uniformities in the electronic properties of array-SWCNT FETs. We have performed a comprehensive analysis of performance variation in array-SWCNT FETs by following three steps: (i) measurement of diameter and density variations across the wafer on which FETs are made, (ii) microscopic level analysis of diameter dependence of SWCNTs’ electronic properties using FETs with single SWNTs, and (iii) macro-scale device analysis following ‘inferential statistics’. The results suggest that performance variation in large-scale array-SWCNT FET is due largely to the distributions in SWCNT diameters and such performance variation show negligible effect of statistical averaging.
Related Publication(s):
A. E. Islam, "Variability and Reliability of Single-Walled Carbon Nanotube Field Effect Transistors," (Invited) Electronics, 2(4), 332-367, 2013. PDF
A. E. Islam*, F. Du*, X. Ho, S. H. Jin, S. Dunham, and J. A. Rogers, “Effect of Variation in Diameter and Density on the Statistics of Aligned Array Carbon-Nanotube Field Effect Transistors”, Journal of Applied Physics, 111, 054511, 2012. (*equal contribution) PDF (Related news in nanotechweb.org)
Large gate-induced hysteresis in I-V characteristics are typically observed in SWNT-based field-effect transistors (FETs). Strategies ranging from the use of surface treatments to pulsed-mode operation can be useful in reducing hysteresis for certain cases. Nevertheless, a broadly applicable approach, based on new materials and grounded in quantitative theoretical understanding of the underlying causes, was missing. We have provided detailed experimental and theoretical studies of the sources of hysteresis in top and bottom-gated SWNT FETs that use both random networks and aligned arrays of SWNTs. We demonstrate that encapsulation with methylsiloxanes can reliably suppress hysteresis, when other aspects of the device processing are also optimized.
Related Publication(s):
A. E. Islam*, S. H. Jin*, T. Kim, J. Kim, M. A. Alam, and J. A. Rogers, “Sources of Hysteresis in Carbon Nanotube Field Effect Transistors and Their Elimination via Methylsiloxane Encapsulants and Optimized Growth Procedures”, Advanced Functional Materials, 22, 2276-2284, 2012. (*equal contribution) PDF
Flexible ‘epidermal’ electronics
We reported revolutionary electronic systems that achieve thicknesses, effective elastic moduli, bending stiffnesses, and areal mass densities matched to the epidermis. Resultant systems incorporated electrophysiological, temperature, and strain sensors, as well as transistors, light-emitting diodes, photodetectors, radio frequency inductors, capacitors, oscillators, and rectifying diodes. Solar cells and wireless coils provided options for power supply. The technology was used to measure electrical activity produced by the heart, brain, and skeletal muscles and to show that the resulting data contain sufficient information for an unusual type of computer game controller.
D.-H. Kim, N. Lu, R. Ma, Y.-S. Kim, R.-H. Kim, S. Wang, J. Wu, S. M. Won, H. Tao, A. Islam, K. J. Yu, T.-I. Kim, R. Chowdhury, M. Ying, L. Xu, M. Li, H.-J. Chung, H. Keum, M. Mccormick, P. Liu, Y.-W. Zhang, F. G. Omenetto, Y. Huang, T. Coleman, J. A. Rogers, "Epidermal Electronics", Science, 2011, p. 838-843.
Department of Electrical and Computer Engineering, Purdue University, IN
Strained silicon based transistors have been used in microprocessors since Intel's 90nm technology node. Incorporation of strain though enhances the performance of transistors, this results uncertainty in reliability evaluation. We performed careful experiments and systematic theory for reliability evaluation and suggested approaches that can intrinsically optimize the reliability constraints in strained transistors.
Variation Resilience in CMOS: The supply voltage of metal-oxide-semiconductor (MOS) transistors has been pinned at ~1.0V for several CMOS generations, making it difficult to reduce overall power-dissipation. Fraction of this supply voltage is used to guard-band against time-zero (due to process variation) and time-dependent (due to defect formation) parametric variation that leads to change in transistor's threshold voltage. We have shown how strained transistors with small ON state transconductance can self-compensate the effects of threshold voltage variation on transistor’s drain current. This relaxes the requirement for guard-band voltage that is used for variability optimization and hence enables designers to operate transistors' at lower supply voltage.
Related Publication(s):
A. E. Islam, and M. A. Alam, “On the Possibility of Degradation-Free Field Effect Transistors”, Applied Physics Letter, 92 (173504), 2008. PDF
A. E. Islam, and M. A. Alam, “Mobility Enhancement Due to Charge Trapping and Defect Generation: Physics of Self-Compensated BTI”, Proc. of International Reliability Physics Symposium (IRPS), pp. 65-72, 2010. PDF
A. E. Islam, and M. A. Alam, “Self-Optimizing Defect Generation for Advanced CMOS Substrates”, International Integrated Reliability Workshop (IIRW), pp. 97-101, 2009. PDF
Interface defect in strained silicon devices: Despite extensive use of strained technology, interface defect generation was poorly understood in strained transistors. In 2008, we presented the first unified theory for interface defect generation in strained/unstrained transistors and show its applicability over a wide range of strain. A careful analysis of my strain-dependent NBTI and gate leakage experiments identified hole capturing into interface defect as the main strain-dependent component. This allowed us to explain the measurements of interface defect generation over a wide range of uniaxial/biaxial, compressive/tensile channel strain.
Related Publication(s):
A. E. Islam, J. H. Lee, W. H. Wu, A. Oates and M. A. Alam, “Universality of Interface Trap Generation and Its Impact on ID Degradation in Strained/Unstrained PMOS Devices During NBTI Stress”, Proceedings of International Electron Devices Meeting (IEDM), pp. 107-110, 2008. PDF | Breeze Presentation
M. A. Alam and A. E. Islam, “On the Reliability of and Self-Compensation in Strained Transistors”, (Invited) International Conference on Solid State Devices and Materials (SSDM), pp. B-9-1, 2009. PDF
Defects in High-K Materials
Contributing Defects in SiON Dielectric: We have identified two competing mechanisms responsible for performance degradation in transistors with silicon oxynitride gate dielectric – (i) defect generation at the oxide-dielectric interface (interface defects) and (ii) hole trapping into pre-existing oxide defects. Our evaluation of interface defect dominance in transistors with plasma oxynitride gate dielectric enabled us to propose a scheme that optimizes not only the interface defect generation, but also the gate leakage. These covers two of the most important issues in oxynitride CMOS technology that was extensively used at that time. In addition, our gate leakage study resolved the long-standing controversy related to the nitrogen dependence of leakage parameters. Similarly, for transistors having thermal oxynitride dielectric, we predicted the dominance of pre-existing oxide defects in performance degradation. We develop a Shockley-Read-Hall based hole trapping/detrapping model to predict that the contribution from pre-existing oxide defects towards nanoscale transistor's performance degradation is significant only upto ~ms timescale. This prediction was later verified using detailed experimental study. Such careful analysis of defect dynamics in transistors with oxynitride gate dielectric enabled us to propose a novel methodology to separate contributions of interface defects and oxide defects.
Related Publication(s):
A. E. Islam, G. Gupta, K. Ahmed, S. Mahapatra, M. A. Alam, “Optimization of Gate Leakage and NBTI for Plasma-Nitrided Gate Oxides by Numerical and Analytical Models”, IEEE Transaction of Electron Devices (T-ED), 55(5), pp. 1143-1152, 2008. PDF
A. E. Islam, H. Kufluoglu, D. Varghese, S. Mahapatra, and M. A. Alam, “Recent Issues in Negative Bias Temperature Instability: Initial Degradation, Field-Dependence of Interface Trap Generation, and Hole Trapping Effects and Relaxation”, (Invited paper for the special issue on Modeling of Nanoscale Transistors) IEEE Transaction of Electron Devices (T-ED), 54(9), pp. 2143-2154, 2007. PDF
A. E. Islam, G. Gupta, S. Mahapatra, A. T. Krishnan, K. Ahmed, F. Nouri, A. S. Oates, and M. A. Alam, “Gate Leakage vs. NBTI for Plasma Nitrided Oxides: Characterization, Physical Principles and Optimization”, Proceedings of International Electron Devices Meeting (IEDM), pp. 12.4.1, 2006. PDF
S. Mahapatra, A. E. Islam, S. Deora, and M. A. Alam, “A Critical Re-evaluation of the Usefulness of R-D Framework in Predicting NBTI Stress and Recovery”, Proc. of International Reliability Physics Symposium (IRPS), pp. 614-623, 2011. PDF
J. H. Lee, W. H. Wu, A. E. Islam, M. A. Alam and A. S. Oates, “Separation method of hole trapping and interface trap generation and their roles in NBTI Reaction-Diffusion model”, Proceedings of International Reliability Physics Symposium (IRPS), pp. 745-746, 2008. PDF
E. N. Kumar, V. D. Maheta, S. Purawat, S. Rani, A. E. Islam, K. Ahmed, M. A. Alam and S. Mahapatra, “Material Dependence of NBTI Physical Mechanism in Silicon Oxynitride (SiON) p-MOSFETs: A Comprehensive Study by Ultra-Fast On-The-Fly (UF-OTF) IDLIN Technique”, Proceedings of International Electron Devices Meeting (IEDM), pp. 809-812, 2007. PDF
S. Mahapatra, K. Ahmed, D. Varghese, A. E. Islam, G. Gupta, L. Madhav, D. Saha and M. A. Alam, “On the Physical Mechanism of NBTI in Silicon Oxynitride p-MOSFETs: Can Differences in Insulator Processing Conditions Resolve the Interface Trap Generation versus Hole Trapping Controversy?”, Proceedings of International Reliability Physics Symposium (IRPS), pp. 1-9, 2007. PDF
Defect Characterization in Devices with High-K gate dielectric: We analyzed a variety of characterization techniques and identified the correction steps needed for proper interpretation of measured quantities to enable the extraction of time dynamics of defects, its physical nature and its impact on transistor performance. More specifically, we have highlighted the importance of considering corrections related to (i) body effect co-efficient, (ii) valence band electron trapping, (iii) time-zero delay, (iv) effective mobility variation, (v) frequency response of defects.
Related Publication(s):
A. E. Islam, H. Kufluoglu, D. Varghese, and M. A. Alam, “A Critical Analysis of Short-term Negative Bias Temperature Instability Measurements: Explaining the effect of time-zero delay for On-the-fly Measurements”, Applied Physics Letter, 90 (083505), 2007. PDF
A. E. Islam, E. N. Kumar, H. Das, S. Purawat, V. D. Maheta, H. Aono, E. Murakami, S. Mahapatra, and M. A. Alam, “Theory and Practice of On-the-fly and Ultra-fast VT Measurements for NBTI Degradation: Challenges and Opportunities”, Proceedings of International Electron Devices Meeting (IEDM), pp. 805-808, 2007. (Nominated for Roger A. Haken Best Student Paper Award) PDF
A. E. Islam, V. D. Maheta, H. Das, S. Mahapatra, and M. A. Alam, “Mobility Degradation Due to Interface Traps in Plasma Oxinitride PMOS Devices”, Proceedings of International Reliability Physics Symposium (IRPS), pp. 87-96, 2008. PDF | Breeze Presentation
M. M. Satter, A. E. Islam, D. Varghese, M. A. Alam, and Anisul Haque, "A Self-Consistent Algorithm to Extract Interface Trap States of MOS Devices on Alternative High-Mobility Substrates", Solid-State Electronics, 56(1), pp. 141-147, 2011. PDF
S. Deora, V. D. Maheta, A. E. Islam, M. A. Alam, and S. Mahapatra, “A Common Framework of NBTI Generation and Recovery in Plasma Nitrided SiON p-MOSFETs”, IEEE Electron Device Letters (EDL), 30(9), pp. 978-980, 2009. PDF
S. Mahapatra, V. D. Maheta, S. Deora, E. N. Kumar, S. Purawat, C. Olsen, K. Ahmed, A. E. Islam, and M. A. Alam, “Material Dependence of Negative Bias Temperature Instability (NBTI) Stress and Recovery in SiON p-MOSFETs”, (Invited Paper) Journal of Electrochemical Society, 2009. PDF
S. Mahapatra, V. D. Maheta, A. E. Islam, and M. A. Alam, “Isolation of NBTI Stress Generated Interface Trap and Hole-Trapping Components in PNO p-MOSFETs”, IEEE Transaction of Electron Devices (T-ED), 56(2), pp. 236-242, 2009. PDF
M. Masuduzzaman, A. E. Islam, and M. A. Alam, “Exploring the Capability of Multi-Frequency Charge Pumping in Resolving Location and Energy Levels of Traps within Dielectric”, IEEE Transaction of Electron Devices (T-ED), 55(12), pp. 3421-3431, 2008. PDF
S. Mahapatra, A. E. Islam, S. Deora, and M. A. Alam, “A Critical Re-evaluation of the Usefulness of R-D Framework in Predicting NBTI Stress and Recovery”, Proc. of International Reliability Physics Symposium (IRPS), pp. 614-623, 2011. PDF
M. Masuduzzaman, A. E. Islam, R. Degraeve, M. Cho, M. Zahid, and M. A. Alam, “Experimental Identification of Unique Oxide Defect Regions by Characteristic Response of Charge Pumping”, Proc. of International Reliability Physics Symposium (IRPS), pp. 207-212, 2011. PDF
M. Masuduzzaman, A. E. Islam, and M. A. Alam, “A multi-probe correlated bulk defect characterization scheme for ultra-thin high-κ dielectric”, Proc. of International Reliability Physics Symposium (IRPS), pp. 1069-1072, 2010. PDF
M. Masuduzzaman, A. E. Islam, and M. A. Alam, “Physics and Mechanics of Dielectric Trap Profiling by Multi-frequency Charge Pumping Method”, Proceedings of International Reliability Physics Symposium (IRPS), pp. 13-20, 2009. PDF
S. Mahapatra, K. Ahmed, D. Varghese, A. E. Islam, G. Gupta, L. Madhav, D. Saha and M. A. Alam, “On the Physical Mechanism of NBTI in Silicon Oxynitride p-MOSFETs: Can Differences in Insulator Processing Conditions Resolve the Interface Trap Generation versus Hole Trapping Controversy?”, Proceedings of International Reliability Physics Symposium (IRPS), pp. 1-9, 2007. PDF
Application of Time-dependent and Higher-order PDE
Reaction-Diffusion Framework: Since its first implementation to interpret morphogenesis and pattern formation in biological species, Reaction-Diffusion (R-D) model has been widely used to study diverse range of natural and engineered phenomena. Among these, application of R-D model for the IC degradation mechanism, commonly known as Negative Bias Temperature Instability (NBTI), received the most attention. Originally proposed in 1977 by Jeppson et al. to interpret fractional kinetics of NBTI degradation, the implications of the R-D model has been explored in hundreds of papers through various generations of CMOS technology. We worked at the forefront to establish the application of R-D model to explain Si-H bond dissociation and subsequent generation of interface defect in nanoscale transistors. The model not only predicted the time evolution and statistics of interface defect generation over 13 decades in time, it also explained the change in interface defect dynamics for different substrates (strained/unstrained) and dielectrics (SiO2, SiON) at different oxide electric field and operating temperature.
Related Publication(s):
A. E. Islam, and M. A. Alam, “Analyzing the Distribution of Threshold Voltage Degradation in Nanoscale Transistors by using Reaction-Diffusion and Percolation Theory”, Journal of Computational Electronics, 10, pp. 341-351, 2011. PDF
A. E. Islam, H. Kufluoglu, D. Varghese, S. Mahapatra, and M. A. Alam, “Recent Issues in Negative Bias Temperature Instability: Initial Degradation, Field-Dependence of Interface Trap Generation, and Hole Trapping Effects and Relaxation”, (Invited paper for the special issue on Modeling of Nanoscale Transistors) IEEE Transaction of Electron Devices (T-ED), 54(9), pp. 2143-2154, 2007. PDF
A. E. Islam, G. Gupta, S. Mahapatra, A. T. Krishnan, K. Ahmed, F. Nouri, A. S. Oates, and M. A. Alam, “Gate Leakage vs. NBTI for Plasma Nitrided Oxides: Characterization, Physical Principles and Optimization”, Proceedings of International Electron Devices Meeting (IEDM), pp. 12.4.1, 2006. PDF
Schrodinger Equation: Quantum-mechanical effects (like carrier quantization in quasi-bound states near the dielectric/substrate interface, energy broadening of the confined carriers leading to leakage through the gate dielectric) are extremely important for nanoscale devices. Since the early works of Stern et al. in 1970s, quantum effects are routinely considered to obtain modification of electrostatics and calculation gate leakage in nanoscale transistors. Many efficient algorithms are developed to exactly, but efficiently solve Schrodinger equation to obtain the distribution of electron wave-function within the quasi-bound states in the channel of nanoscale transistor. We solve Schrodinger equation using transmission line analogy to model the electrostatics in nanoscale transistor, thus provide an better way to extract oxide thickness and interface defect density through simple electrical characterization.
A. E. Islam, A. Haque, “Accumulation gate capacitance of MOS devices with ultra-thin high-K gate dielectrics: Modeling and Characterization”, IEEE Transaction of Electron Devices (T-ED), 53(6), pp. 1364-1372, 2006. PDF
M. M. Satter, A. E. Islam, D. Varghese, M. A. Alam, and Anisul Haque, "A Self-Consistent Algorithm to Extract Interface Trap States of MOS Devices on Alternative High-Mobility Substrates", Solid-State Electronics, 56(1), pp. 141-147, 2011. PDF
