Achievements

Gate Score 2000: 97.03 Percentile

Secured 2nd Position in NPTEL course," Foundations of Wavelets and Multirate Digital Signal Processing "in March 2017.

Secured 83% in NPTEL Course," Hardware Design using Verilog" in Nov. 2018

Organised National Conference on "Recent trends in Wired and Wireless Communications", in S.I.E.S Graduate School of Technology, in March 2008.

Conducted a workshop for students on"FPGA design using VHDL" in SIESGST in December 2017 and September 2018.