ARCHITECTURE
Describe the characteristics of CPU architecture, including Von Neumann architectures.
Identify and explain the role of the components of the CPU in the fetch-decode-execute cycle.
Explain how performance is affected by the cache size, clock speed and number of cores.
Explain the difference between RISC and CISC types of processors
The CPU processes data and instructions and controls the computer system.
Within the CPU is the:-
ALU - performs all the arithmetic and logical operations.
Control Unit - Directs the flow of instructions and/or data and coordinates the other parts of the CPU by generating clock ticks (it controls the clock)
Registers - A storage location found on the CPU where data or control information is temporarily stored. Registers are much faster access than internal memory.
Internal Memory - Can be known as Cache Memory. Used to store frequently accessed data and instruction that need to be accessed quickly by the CPU. This data is lost when the power is switched off.
The fetch-decode-execute cycle is a key feature of the von Neumann architecture and consists of seven stages:
The memory address held in the program counter (PC) is copied into the memory address register (MAR).
The address in the program counter is incremented (increased) by one. The program counter now holds the address of the next instruction to be fetched.
The processor sends a signal along the address bus to the memory address held in the MAR.
The instruction or data held in that memory address is sent along the data bus to the memory data register (MDR).
The instruction or data held in the MDR is copied into the current instruction register (CIR).
The instruction or data held in the CIR is decoded and then executed. Results of processing are stored in the accumulator (ACC).
The cycle returns to step one.