FPGA/ASIC design and Verification

Design with Xilinx, Intel FPGAs.

Verification with ModelSim ,Quartus, Vivado, VCS.

Supporting LCoS micro-display IPs

Timing controller IP.

Field Sequential Frame buffer Control IP

Keystone, Pincushion IP

Supporting RTL design consulting

Specific custom RTL for clients such as Pentile RGBG, RGBW, Scaler or etc.