PHASE 1 (Due date: in-class presentation is cancellation due to COVID19)
Hand in your status and simulation results in your report in IEEE double-column format. Due date: 6/2/2021.
1. Based on the specification, you do all evaluations to decide system-level designs: architecture, order, sampling rate, number of levels of quantizer.
2. Finish the Matlab/Simulink Model.
You should model these nonidealities at least: thermal noise, opamp final gain, integrator output swing,
3. Prepare your system-level in 5-10 minutes presentation. (Presentation date is TBD)
PHASE 2 (Final report due date: 23:59, 6/16/2021)
Final report should be in IEEE double-column format.
Circuit design using behavior macro models.
Project help can be found here:
Candence macro model . HSPICE macro models (made by TA).
matlab toolbox by Richard Schreier
Simulink toolbox by Prof. Maloberti
chapter 6 is delta sigma Simulink models.
Additional Matlab Functions need to be downloaded and included (use "addpath" to include the library).
Delta Sigma Toolbox by Malcovati in Matlab R2009b. (might not be compatible with newer versions.)