You will be given a top-down design of Delta Sigma modulator. You will design in Cadence & Spectre or HSpice.
You will re-work the ECE627 2010 class project at Oregon State University.
Project Report Example by Brian Young, Oregon State University.
PHASE 1
1. Based on the specification, you do all evaluations to decide system-level designs: architecture, order, sampling rate, number of levels of quantizer.
2. Finish the Matlab/Simulink Model.
You should model these nonidealities at least: thermal noise, opamp final gain, integrator output swing,
3. Prepare your system-level in 5-10 minutes presentation. (Presentation date is TBD)
PHASE 2
Circuit design using behavior macro models.
Project help can be found here:
Candence macro model . HSPICE macro models (made by TA).
chapter 6 is delta sigma Simulink models.
Additional Matlab Functions need to be downloaded and included (use "addpath" to include the library).