Your project report and transistor size will be compared by turnitin.com. If plagiarizism or falsifying occurs, your project will not be graded and 0 credit.
Some minor problems are fixed, and use the updated GEE5101_0106_2021 .
Cadence Virtuoso (ICFB6) files to test your integrator & opamp. (Use INT_testbench_hspice or INT_testbench_spectre)
The NMOS and PMOS model is included.
You are free to test your design by using HSPICE .sp command .tran simulations for settling.
Use the test bench to test your settling and THD. Use Cadence Analog Design Environment (ADE) to convert schematics into netlist.
HSPICE marcomodel of ideal switch to run .tran simulations:
.param VDD=1.8 VSS=0
.subckt switch_hspice clk in out vss
Gsw in out VCR PWL(1) clk vss 0, 100e9 'VDD*0.4', 100e9 'VDD*0.6', 10 VDD, 10
.ends
Differential AC input source to test your frequency response
Check the GEE5101 ac_input schematics to generate the "differential" input AC source. Or, use the following netlist for your reference:
e8 vinp vcmi VCVS vinac 0 1
e9 vcmi vinn VCVS vinac 0 1
vac_in vinac 0 DC=0 AC 500e-3
v2 vcmi 0 DC=900e-3
Noise simulations
HSPICE offers a command to add transient noise, but it takes very long simulation time. You are free to learn and use this.
Use .noise to simulate opamp's thermal noise power spectrum [V^2/Hz]. Integrated the total integrated noise [V^2}.
The "model" can be simulated in Cadence Spectre.
Ideal switch
Library Name: analogLib; Cell Name: switch
You can run transient simulation of an inverter in Spectre: inverter_tran_test
Additional Help to simulate thermal noise by using PSS/PNOISE if you are interested. (This is for your reference only.)