Implementing and Evaluating Quantum Error Correction Codes

The long-term viability of large-scale quantum computing critically depends on the effective implementation and evaluation of Quantum Error Correction (QEC) codes. While many QEC codes have been proposed, their evaluation has often relied on simplified metrics—most notably, the number of physical qubits required to encode a logical qubit on a given hardware platform. Although qubit count is important, it is only a first-order proxy for overall system cost. In practice, the optimality of a QEC design is multi-dimensional and depends on interacting system-level constraints, including: 

1. Total number of physical qubits

2. Spatial and temporal volume of QEC circuits

3. Threshold and logical error rates

4.  Scheduling efficiency of syndrome extraction

5.  Overheads associated with state distillation or magic-state factories 

6. Decoder performance and real-time constraints. 

Today, the field lacks mature end-to-end methodologies and software infrastructure for systematically implementing, mapping, and comparing QEC codes under realistic architectural assumptions.

Addressing this gap requires close collaboration across quantum information science, systems, and hardware architecture—an intersection that closely aligns with the ISCA community. This tutorial introduces a systems-oriented view of QEC, focusing on how QEC codes are implemented, scheduled, mapped to hardware, and evaluated under realistic constraints.

The tutorial will walk through concrete examples of implementing logical qubits using representative QEC codes, highlighting practical considerations such as lattice surgery, transversal gates, syndrome-extraction scheduling, decoder integration, and real-time constraints. Attendees will learn how architectural choices and scheduling strategies affect logical error rates, thresholds, and overall resource efficiency. The material is designed to be accessible to participants with a systems background and basic familiarity with quantum information concepts. By connecting QEC theory with architectural and runtime realities, the tutorial aims to engage the ISCA community with emerging challenges at the boundary of quantum architecture, compilation, and fault-tolerant system design. 

Tutorial outline:

1. From QEC Theory to Hardware Implementation: logical qubits and code primitives; representative end-to-end QEC implementations.

2. Lattice Surgery and Transversal Operations: principles of lattice surgery; trade-offs in fault-tolerant gate realization.

3. Scheduling QEC Operations: syndrome-extraction scheduling; effects on code distance, threshold, and performance.

4. Mapping QEC to Hardware Architectures: hardware-aware placement and routing; estimation of space–time volume and system cost.

5. Decoding and Real-Time Constraints: stabilizers and decoder integration; latency, throughput, and hardware acceleration.

6. Open Challenges and Research Directions: toolchain gaps, benchmarking challenges, and opportunities for systems and architecture research.

Schedule: 

8-10AM Compiling for Fault Tolerant Quantum Computers

• Overview of end-to-end software stack

• Compiling to FT gate sets (Clifford+T)

  1. Single qubit synthesis (Rz) 

  2. Multi-qubit synthesis

  3. Scalability, open directions etc.

10-10:30AM Break

10:30-12PM Resource and Error Aware Compilation Workflows

• Algorithmic error, approximations

• Ancilla based compilation

1:30-3:30PM Quantum Error Correction

• Error correction codes - overview

• Scheduling code operations to improve error rates (within logical qubit)

• Mapping logical qubits using lattice surgery

  1. Mapping surface codes with T-state cultivation and real-time constraints

  2. Topological mapping of surface codes

3:30-4PM Break

4PM-  Real time decoding

Presenters:  

Steven Hofmeyr, Costin Iancu, Mathias Weiden, Justin Kalloor - Lawrence Berkeley National Laboratory

Gushu Li - University of Pennsylvania

Yue Wu - Microsoft Quantum

Costin Iancu: Senior Scientist at Lawrence Berkeley National Laboratory, with extensive experience in developing end-to-end compilers and schedulers for quantum computing, as well as a background in traditional systems. He leads the Berkeley Quantum Synthesis Toolkit  (BQSKit) project, a software infrastructure recognized with multiple Best Paper Awards (IEEE QCE 2020-2022), boasting over 700,000 downloads and numerous applications in academia and industry.

Ed Younis: Senior Engineer at Lawrence Berkeley National Laboratory, leading the BQSKit software development. He is the recipient of multiple IEEE QCE Best Paper Awards and an world class expert in program synthesis and developing application specific compilation workflows for quantum algorithms.

Steven Hofmeyr: Senior Engineer at Lawrence Berkeley National Laboratory, skilled in developing production-level exascale metagenome assemblers, novel operating systems, and customized parallel application scheduling software. He is currently focusing on machine learning for the scheduling of quantum surface codes. Hofmeyr has been recognized as one of InfoWorld’s Top 12 Innovators of the Year in 2004 and received the MIT Technology Review TR100 Innovators of the Year award in 2003 and the IEEE Security and Privacy Test of Time award in 2020.

Mathias Weiden:  Researcher at Microsoft Quantum, graduated in 2026 from University of California, Berkeley, with extensive experience in compiling for fault-tolerant quantum devices and implementing end-to-end QEC codes. His thesis focuses on optimizing the implementation of circuits on resource-constrained early fault-tolerant quantum devices.

Justin Kalloor: PhD candidate in Computer Science at UC Berkeley, graduating in 2027, with extensive experience in quantum circuit compilation and architecture design for both NISQ and fault-tolerant quantum devices. His research focuses on scalable approximate compilation workflows and T gate optimization for fault-tolerant computation.

Gushu Li: Assistant Professor at the University of Pennsylvania. His research focuses on quantum compilation, fault-tolerant quantum computing, and quantum computer architecture, with an emphasis on system-level optimization. He has published extensively at top systems and PL venues, including ISCA, ASPLOS, PLDI, and CAV, and actively collaborates with national labs and industry partners. His research has been recoganized by NSF CAREER Award, Intel Rising Star Faculty Award, etc.

Yue Wu: Senior Researcher at Microsoft, with a PhD from Yale University. He specializes in quantum error correction decoding systems for fault-tolerant quantum computing. He developed Fusion Blossom, a high-performance minimum-weight perfect matching decoder recognized with the IEEE QCE Best Paper Award, and Micro Blossom, a hardware-accelerated MWPM decoder published at ASPLOS 2025.