Micro Systems Lab
A unique DOE Facility with class 10 cleanroom for semiconductor and superconductor device fabrication
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MSL Layout
MSL Layout
Originally conceived to support SSC R&D, the MSL evolved to invent thick, fully depleted backside illuminated CCDs, and is now evolving further to enable superconducting device fabrication
Plasma-Enhanced Chemical Vapor Deposition (PECVD)
Upgraded to a PlasmaTherm control system. Uses include CCD passivation and backside protection, as well as germanium gate dielectric R&D
Photolithography
Vapor prime and RightTrack photoresist coater with batch develop, a BetaSquared 1:1 Micralign mask aligner and a 0.5 micron layer-to-layer alignment inspection station. Myriad uses (see also below).
Plasma Etch
Stand-alone Lam Research 4520XL dielectric etcher. Uses include CCD contact via SiO2 etch, and R&D towards germanium CCDs.
Thin-Film Deposition
KDF 603i batch sputter deposition system includes both DC and RF sputtering capabilities. Typical processes include Al, ZrO2, SiO2.
Coming Soon!
Coming Soon!
A new Heidelberg direct write lithography tool with 0.3 um resolution and backside processing capability is coming later in 2024 to enable quick-turn R&D and faster device prototyping. This will supplement our existing capability.
What are we building at the MSL?
What are we building at the MSL?
A selection of recent detector fabrication projects are shown below.
Silicon CCDs
Silicon CCDs
A finished CCD wafer, showing multi-amplifier sensing (MAS) detail at a readout corner
CCD backside thin films
CCD backside thin films
Superconducting resonantors
Superconducting resonantors
For multiplexed readout
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