न उल्फ़त, न नफ़रत, न सुकून-अलम से खेलूं |
ख्वाइश इतनी है ताउम्र तक कलम से खेलूं ||
~विशेष मिश्रा
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Vishesh Mishra विशेष मिश्रा
Prime Minister's Research Fellow, Department of CSE, IIT Kanpur, Uttar Pradesh, INDIA-208016.
Visiting Research Fellow, INRIA Centre at University of Rennes, FRANCE - 35042.
External Research Collaborator at CANDLE LAB, IIT Roorkee, Uttarakhand, INDIA-247667.
Previously, I have served as a Student Research Associate and Senior Research Associate at the Dept. of CSE at IIT Kanpur.
Work Address: J2, Ist Floor, C3i Center, IIT kanpur
Email: first-name@cse.iitk.ac.in
“An equation for me has no meaning, unless it expresses a thought of God.” ― S. Ramanujan
[News & Activities]
[Jan.2026] Our paper titled “SilentBite: A Novel LLM-Based Framework for Automated Hardware Trojan Insertion”, has been accepted for publication in the proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2026), to be held in Shanghai, China.
[Oct.2025] Our paper titled "PowerShift: Leveraging Power-Aware Weight Approximations for Neural Network Acceleration" has been accepted as a regular paper in the 39th IEEE International Conference On VLSI Design (VLSID 2026), to be held in Pune, India.
[Oct.2025] Our paper titled "Dual-Mode Rounding Algorithms and Hardware for Posit-Based DNN Training: The Future of Mixed Precision Frameworks" has been accepted for publication in the ACM Transactions on Embedded Computing Systems (TECS), 2025.
[Aug.2025] Our paper titled "SATGuard: SAT-Driven Countermeasures for Protecting Approximate Circuits from Hardware Trojan" has been accepted for publication in the ACM Transactions on Embedded Computing Systems (TECS), 2025.
[Jul.2025] Our paper titled "SERA-Float: A Soft Error Resilient Approximate Floating-Point Computing Format" has been accepted as a regular paper in the IEEE International Conference on Computer-Aided Design (ICCAD 2025), to be held in, Munich, Germany.
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