Day 2 Schedule

December 6, 2023 (Times listed for both JST and EST)

8:00 - 8:05am (JST); 6:00-6:05pm (EST)

Opening Remark and Overview of the Workshop
- Mehdi Saligane, University of Michigan
- Koji Inoue, Kyushu University

8:05 - 8:35am (JST); 6:05-6:35pm (EST)

Innovation by Collaboration: CHIPS Alliance
- Rob Mains, CHIPS Alliance, Linux Foundation 

8:35 - 9:05am (JST); 6:35-7:05pm (EST)

Developing CMOS+X Platforms for Artificial Intelligence and Beyond
- Brian Hoskins, NIST 

9:05 - 9:35am (JST); 7:05-7:35pm (EST)

Agile-X: Agile Chip Design and Fabrication Platform
- Makoto Ikeda, University of Tokyo

9:35 - 9:45am (JST); 7:35-7:45pm (EST)

Break

9:45 - 10:15am (JST); 7:45-8:15pm (EST)

The future of semiconductor : chips and chiplets
- Dan J. Dechene, IBM Research

10:15 - 10:45am (JST); 8:15-8:45pm (EST)

AI Chip Design Center – open hub for chip innovation
- Kunio Uchiyama, National Institute of Advanced Industrial Science and Technology  

10:45 - 11:15am (JST); 8:45-9:15pm (EST)

OpenROAD: A Platform for Innovation and Workforce Development
- Andrew Kahng, UC San Diego

11:15 - 11:45am (JST); 9:15-9:45pm (EST)

Bootstrapping an Open Source Silicon Ecosystem  

  - Johan Euphrosine, Google

11:45 - 12:00am (JST); 9:45-10:00pm (EST)

Conclusion and Overview of the phase-2 workshop activities
- Mehdi Saligane, University of Michigan
- Koji Inoue, Kyushu University