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email: zl544@cornell.edu

IC Packaging Engineer, Apple Inc., 2021 -

Simulation DRI for Apple Silicon M-series Ultra chips used in Mac Studio and Mac Pro, performing theoretical and numerical analysis across:
- Chip-Package Interaction (CPI), e.g., reliability of micro-bump, hybrid bonding, and extreme low-k (ELK) dielectric layer.
- Package-Board Interaction (PBI), e.g., warpage, solder joint reliability (SJR), thermal cycling (TC) test, and shock test.
- Package-System Interaction (PSI), e.g., SoC station test, SLT, and system tip test.
Large-sized SoC packaging methodology development:
- Power cycling SJR reliability analysis (with Apple Mac Reliability Team).
- Multi-scale system-package co-simulation for Mac Pro (with Apple Product Design Team).
- Feasibility study of advanced packaging technologies for next generation AI servers.
Co-Packaged Optics (CPO) packaging development (with Apple Biophotonics Team):
- Coupled stress-optical modeling for silicon photonics devices.
- Advanced 2.5D and 3D packaging architecture exploration.
Warpage, stress and fatigue failure analysis for wireless module packaging used in iPhone devices.
IC packaging materials characterization and design of experiments.

M.S. (Electrical and Computer Engineering), Purdue University, 2029 (expected)
- 1st concentration: Microelectronics and Advanced Semiconductors (core course: Solid State Devices)
- 2nd concentration: VLSI and Circuit Design (core course: MOS VLSI Design)
- GPA: 4.0/4.0
Ph.D. (Theoretical and Applied Mechanics), Cornell University, 2021
- Research interests: Surface Mechanics, Fracture Mechanics, Finite Element Method, Adhesion and Contact Mechanics, Large Deformation of Soft Matters
- GPA: 4.16/4.3
M.S. (Structural Engineering), Tsinghua University, 2016
- GPA: 93.2/100 Rank: 1/66
B. Eng. (Civil Engineering), Tongji University, 2013
- GPA: 4.96/5.0 Rank: 1/527

Tennis, Driving, Dota2

Wife: Xiaotong Wang, Esq.

Daughter: Raelynn W. Liu

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