Da-Eun Bang

Semiconductor Device & Process Development Lab (Academic Advisor: Jun-Young Park)

Building E10, Room 204, Chungbuk National University

E-Mail : bangdaeun@chungbuk.ac.kr  

Education

• M.S. in Semiconductor Engineering, Department of Electrical and Computer Engineering, Chungbuk National University, Cheongju, Republic of Korea. (Mar. 2025 – Present)

• B.S. in Semiconductor Engineering, Department of Electronic Engineering, Chungbuk National University, Cheongju, Republic of Korea. (Mar. 2021 – Feb. 2025)   

Skills

• Device Fabrication Processing (Rapid Hydrogen Annealing, Rapid Deuterium Annealing, Reactive Ion Etcher, Atomic Layer Deposition, Mask Aligner, Spin Coater)

• Device Characterization (Surface Profiler, Probe Station (Keithley 4200A, B1500A))

• TCAD Simulation of Semiconductor Devices (Synopsys Sentaurus, Silvaco Athena & Atlas)   

Publications (SCIE)

[5] S.-M. Kang*, H.-J. Park, E.-C. Yun, D.-E. Bang, M.-S. Kim, and J.-Y. Park, "Dual-Parameter Variable Physically Unclonable Function (PUF) for Multi-level Cell Silicon MOSFETs", ACS Appl. Electron. Mater., in press.

[4] M.-K. Lee*, D.-E. Bang*, S.-J. Chang, H.-J. Park, E.-C. Yun, S.-M. Kang, M.-W. Kim, D. Sohn, and J.-Y. Park, "Rapid Hydrogen Annealing for Enhanced Device Performance and Reduced Thermal Budget", Semicond. Sci. Technol., vol. 41, no. 2,  p. 025012, Feb. 2026.  [ Website ]  

[3] D. Sohn*, M.-K. Lee, D.-E. Bang, H.-J. Park, E.-C. Yun, S.-M. Kang, M.-W. Kim, H.-T. Jeon, and J.-Y. Park, "Wrap-Around Word-Line DRAM Cell Transistor Enabling Enhanced Read/Write Speed", IEEE Trans. Electron Devices, vol. 73, no. 1,  pp. 271–278, Jan. 2026.  [ Website ] 

[2] D.-E. Bang*, M.-K. Lee, E.-C. Yun, T.-H. Kil, H.-J. Park, J.-W. Yeon, M.-W. Kim, S.-J. Jeon, A-Y. Kim, and J.-Y. Park, "Junction Depth Optimization in Trench Gate Nanosheet FETs for Reduced Off-State Current", Silicon, vol. 17, pp. 3565–3572, Nov. 2025.  [ Website ]

[1] M.-W. Kim*, H.-J. Park, M.-K. Lee, E.-C. Yun, S.-M. Kang, D.-E. Bang, T.-H. Kil, D. Sohn, and J.-Y. Park, "Study on the Impact of Deuterium Annealing Duration on MOSFET Performance", Semicond. Sci. Technol., vol. 40, no. 11,  pp. 1–6, Nov. 2025.  [ Website ]   

Publications (Domestic)

[1] A-Y. Kim*, D.-E. Bang*, H.-J. Park, T.-H. Kil, J.-W. Yeon, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, M.-S. Kim, and J.-Y. Park, "Study on Hetero Gate Dielectrics to Reduce Ambipolar Current in Nanosheet Tunneling FETs", J. Korean Inst. Electr. Electron. Mater. Eng., vol. 38, no. 3, pp. 296–301, May 2025. [ Website ]  

Conferences

[14] D. Sohn*, S.-M. Kang, D.-E. Bang, E.-C. Yun, M.-K. Lee, H.-J. Park, M.-W. Kim, and J.-Y. Park, "DRAM Cell Transistor with Wrap-Around Word-Line (WAW) Structure for Enhancing Read/Write Performance", The 33rd Korean Conference on Semiconductors, Jan. 2026. [ PDF ]

[13] S.-M. Kang*, D.-E. Bang, D. Sohn, H.-J. Park, E.-C. Yun, M.-W. Kim, M.-S. Kim, and J.-Y. Park, "Multi-Level Cell Physically Unclonable Function (PUF) Based on Dual Physical Parameters in Silicon MOSFETs", The 33rd Korean Conference on Semiconductors, Jan. 2026. [ PDF ]

[12] M.-W. Kim*, H.-J. Park, E.-C. Yun, S.-M. Kang, D.-E. Bang, D. Sohn, and J.-Y. Park, "Comparative Study of Multiple High-Pressure Rapid Deuterium Annealing for MOSFET Performance Enhancement", The 33rd Korean Conference on Semiconductors, Jan. 2026. [ PDF ]

[11] M.-W. Kim*, H.-J. Park, E.-C. Yun, S.-M. Kang, D.-E. Bang, D. Sohn, and J.-Y. Park, "Study on the Efficiency of Deuterium Annealing for Various Process Durations", The 33rd Korean Conference on Semiconductors, Jan. 2026. [ PDF ]

[10] A-Y. Kim*, J.-W. Yeon, H.-J. Park, T.-H. Kil, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, D. Sohn, D.-E. Bang, S.-M. Kang, and J.-Y. Park, "Hetero-Gate Dielectric Structures for Reducing Ambipolar Current in Nanosheet Tunneling FETs", The 32nd Korean Conference on Semiconductors, Feb. 2025. [ PDF ]

[9] M.-K. Lee*, H.-J. Park, E.-C. Yun, J.-W. Yeon, T.-H. Kil, M.-W. Kim, S.-J. Jeon, D.-E. Bang, D. Sohn, A-Y. Kim, S.-M. Kang, and J.-Y. Park, "Partial Trench Gate Nanosheet FETs for Enhanced ION/ IOFF Ratio", The 32nd Korean Conference on Semiconductors, Feb. 2025. [ PDF ] 

[8] J.-W. Yeon*, H.-J. Park, T.-H. Kil, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, D. Sohn, A-Y. Kim, S.-M. Kang, D.-E. Bang, and J.-Y. Park, "Low-Temperature Deuterium Annealing for Improved Immunity against Hot-Carrier Injection in HKMG MOSFETs", The 32nd Korean Conference on Semiconductors, Feb. 2025. [ PDF ] 

[7] T.-H. Kil*, J.-W. Yeon, H.-J. Park, D.-E. Bang, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, D. Sohn, A-Y. Kim, S.-M. Kang, and J.-Y. Park, "Material Engineering of Inner Spacer in Nanosheet FETs to Reduce Off-State Current", The 32nd Korean Conference on Semiconductors, Feb. 2025. [ PDF ] 

[6] D.-E. Bang*, J.-W. Yeon, H.-J. Park, T.-H. Kil, M.-K. Lee, E.-C. Yun, M.-W. Kim, S.-J. Jeon, D. Sohn, A-Y. Kim, S.-M. Kang, and J.-Y. Park, "Junction Depth Engineered Trench Gate Nanosheet FETs for Suppressing Leakage Current in Parasitic Substrate Channels", The 32nd Korean Conference on Semiconductors, Feb. 2025. [ PDF ] "Award" [ PDF ]

[5] Y.-J. Choi*, S.-M. Kang, H.-J. Park, T.-H. Kil, J.-W. Yeon, H.-S. Jee, E.-C. Yun, M.-K. Lee, D. Sohn, D.-E. Bang, A.-Y. Kim, and J.-Y. Park, "Impact of Hydrogen Passivation after Deuterium Annealing in the Fabrication of Silicon MOSFETs", KIEEME Annual Summer Conference 2024, Jun. 2024. [ PDF ] "Award" [ PDF ] 

[4] H.-S. Jee*, D. Sohn, J.-W. Yeon, H.-J. Park, T.-H. Kil, E.-C. Yun, M.-K. Lee, S.-M. Kang, A.-Y. Kim, Y.-J. Choi, D.-E. Bang, and  J.-Y. Park, "Development of Physically Unclonable Function (PUF) using Multiple Process Variables", KIEEME Annual Summer Conference 2024, Jun. 2024. [ PDF ]  "Award" [ PDF ] 

[3] E.-C. Yun*, J.-W. Yeon, H.-J. Park, T.-H. Kil, M.-K. Lee, H.-S. Jee, D. Sohn, S.-M. Kang, A.-Y. Kim, Y.-J. Choi, D.-E. Bang, and  J.-Y. Park, "Spacer-Less Trench Gate Nanosheet FET for Improved On-State Current and Simplified Fabrication Process", KIEEME Annual Summer Conference 2024, Jun. 2024. [ PDF ] 

[2] T.-H. Kil*, H.-J. Park, J.-W. Yeon, E.-C. Yun, M.-K. Lee, D. Sohn, H.-S. Jee, S.-M. Kang, A.-Y. Kim, Y.-J. Choi, D.-E. Bang, and  J.-Y. Park, "Low-Temperature Deuterium Annealing for Enhanced Ionizing Radiation and Electrical Stress Immunity in MOSFETs", KIEEME Annual Summer Conference 2024, Jun. 2024. [ PDF ] 

[1] D.-E. Bang*, A-Y. Kim, Y.-W. Yeon, H.-J. Park, T.-H. Kil, M.-K. Lee, E.-C. Yun, D. Sohn, H.-S. Jee, S.-M. Kang, Y.-J. Choi, and J.-Y. Park, "Optimization of Doping Profile for Improved Performance of Nanosheet FET", KIEEME Annual Summer Conference 2024, Jun. 2024. [ PDF ] "Award" [ PDF ] 

International Experience

• Research Internship Program, imec, Leuven, Belgium. (Apr. 2026 – Present)

• Global frontier Exchange Student, RMIT University, Melbourne, Australia. (Jan. 2024 – Feb. 2024) 

Research Projects

• Preliminary Study on Structure and Process Development of SiC/GaN/Si Power Devices, INTC Co., Ltd. (Nov. 2025 – Oct. 2026)

• Improvement of Gate Dielectric Reliability in Silicon MOSFETs via High-Pressure Deuterium Annealing, Samsung Electronics Co., Ltd. (Dec. 2024 – Apr. 2025)

• Development of Semiconductor Process Technologies and Services Based on Deuterium, Ministry of Science and ICT. (May. 2024 – Dec. 2024)

Awards & Scholarships 

• 2026 Global Advanced Semiconductor Fab Internship Program

• 2024 KIEEME Annual Summer Conference Encouragement Awards (3 Awards)

Teaching Assistant (TA)

• Semiconductor Processing and Analysis (Feb. 2026)

• Semiconductor Devices (Sep. 2025 – Dec. 2025)

• Advanced Topics in Semiconductors (Mar. 2025 – Jun. 2025)

https://sites.google.com/view/semi-lab

https://sites.google.com/chungbuk.ac.kr/bangdaeun