Oculus
FPGA hardware accelerator board with gigabit ethernet, DDR3, and USB 2.0
FPGA hardware accelerator board with gigabit ethernet, DDR3, and USB 2.0
Matthew Song and James Lukas
Overview:
This is Oculus, an 8-layer FPGA accelerator board created in Altium intended to serve as a companion processor on the UAVs@Berkeley competition hexacopter. One of UAVs@Berkeley's projects used the OpenCV implementation of ORB, a computer vision algorithm that is used to help match points in images together. Unfortunately, it runs at about 2 frames per second on our onboard computer, so I thought it would be an awesome experience to create a PCB to run a hardware implementation of it. Video data is streamed over RTSP into the ethernet port, processed on the FPGA, and output to the main onboard computer through USB 2.0. This particular form factor is compact and light, which is good for use aboard our drone where space and weight are at a premium.
Features:
512MB DDR3 SDRAM
USB to UART/JTAG for debugging and programming
USB 2.0 with switchable host/peripheral mode
Gigabit ethernet
3 boot modes (microSD, QSPI, and JTAG)
3D render in Altium
Technical Progress
Board Development
We decided on an 8 layer stack up due to the density of our lines. Originally, we started with 6 layers while attempting to stay within a small form factor. However, routing became difficult and pours were on the same plane as signal wires which was not ideal. Thus we expanded into 8 layers to give us additional space for our connections.
Bringup
All power levels stable
JTAG programming/debug and UART over FT2232 USB converter
Programming of SoC PL and PS over USB
Blink, DDR3 test, and Hello World over UART
DDR3 runs with errors
Power sequencing has circular logic (fixed)
1V5 LDO wired backwards (fixed, but causing overheating problems elsewhere)
UVLO set too high for multi channel converter IC (fixed)
PNP transistors for LED control (fixed)
Ethernet server example requires hardware timer (WIP)
New power converter IC with programmable startup and shutdown timing (needs external MCU for setup)
Optimization of board size
Removal of FT2232 (or swap to FT232), Raspberry Pi header, and host/peripheral switch
More components on the back of the board