PUBLICATIONS
Doctoral Thesis
Mahesh Balasubramanian, "Compiler Design for Accelerating Applications on Coarse-Grained Reconfigurable Architectures". [PDF]
Journals and Conferences
Mahesh Balasubramanian, Aviral Shrivastava, "PathSeeker: A Fast Mapping Algorithm for CGRAs.", in Proceedings of the 25th International Conference on Design Automation and Test in Europe (DATE), 2022. [PDF]
Mahesh Balasubramanian, Aviral Shrivastava, “CRIMSON: Compute-intensive loop acceleration by Randomized Iterative Modulo Scheduling and Optimized Mapping on CGRAs.”, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020. [PDF]
Mahesh Balasubramanian, Trevor Ruiz, Brandon Cook, Mr Prabhat, Sharmodeep Bhattacharyya, Aviral Shrivastava, Kristofer Bouchard, "Scaling of Union of Intersections for Inference of Granger Causal Networks from Observational Data", in Proceedings of the 34th IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020. [PDF]
Trevor Ruiz, Sharmodeep Bhattacharyya, Mahesh Balasubramanian, Kristofer Bouchard, "Sparse and Low-bias Estimation of High Dimensional Vector Autoregressive Models", in Learning for Dynamics and Control (L4DC), 2020. [PDF]
Shail Dave, Mahesh Balasubramanian, Aviral Shrivastava, "RAMP: Resource-Aware Mapping for CGRAs", in Proceedings of the 55th Annual Design Automation Conference (DAC), 2018 [PDF]
Mahesh Balasubramanian, Shail Dave, Aviral Shrivastava, Reiley Jeyapaul, "LASER: A Hardware/Software Approach to Accelerate Complicated Loops on CGRAs", in Proceedings of the 21st International Conference on Design Automation and Test in Europe (DATE), 2018 [PDF]
Shail Dave, Mahesh Balasubramanian, Aviral Shrivastava, "URECA: A Compiler Solution to Manage Unified Register File for CGRAs", in Proceedings of the 21st International Conference on Design Automation and Test in Europe (DATE), 2018 [PDF]
Patents
Pending: Mahesh Balasubramanian and Aviral Shrivastava, “System and Methods for Improved Mapping of Computational Loops on Reconfigurable Architectures. ”
Pending: Mahesh Balasubramanian, Shail Dave, Aviral Shrivastava, and Reiley Jeyapaul, "A Hybrid and Efficient Approach to Accelerate Complicated Loops on Coarse-Grained Reconfigurable Arrays (CGRA) Accelerator"
arXiv
Trevor Ruiz, Mahesh Balasubramanian, Kristofer Bouchard, Sharmodeep Bhattacharyya, "Sparse, Low-bias, and Scalable Estimation of High Dimensional Vector Autoregressive Models via Union of Intersections", 2019 [PDF]
Mahesh Balasubramanian, Trevor Ruiz, Brandon Cook, Mr Prabhat, Sharmodeep Bhattacharyya, Aviral Shrivastava, Kristofer Bouchard, "Optimizing the Union of Intersections LASSO (UoI_LASSO) and Vector Autoregressive (UoI_VAR) Algorithms for Improved Statistical Estimation at Scale", 2018 [PDF]
Open Source tools