Invited Speakers

Jason O. Hallstrom (NSF) 

Dr. Jason O. Hallstrom is a Program Director with the U.S. National Science Foundation, serving within the Computer and Information Science and Engineering Directorate. His areas of program responsibility include Computer Systems Research, Future of Semiconductors, Formal Methods in the Field, Expeditions in Computing, CISE Community Research Infrastructure, and Mid-scale Research Infrastructure-1.

Sung Kyu Lim (DARPA)

Dr. Sung Kyu Lim joined DARPA in August 2022 as a program manager in the Microsystems Technology Office (MTO). He has previously served as the principal investigator for multiple DARPA programs. While serving at DARPA, he continues his role as the Motorola Solutions Foundation Professor at Georgia Institute of Technology’s School of Electrical and Computer Engineering. Dr. Lim received his doctorate degree from the University of California, Los Angeles in 2000. Lim’s research focus is on architecture, design, and electronic design automation (EDA) for 2.5D and 3D integrated circuits. He has published more than 400 papers on the topics. He received the Best Paper Award from the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems in 2022. He is an IEEE fellow.

Narayan Srinivasa (Intel Labs)

Dr. Narayan Srinivasa is an expert in machine learning and neuromorphic computing and its applications to solve real-world problems. He is currently with Intel Labs as Director of Machine Intelligence Research Programs and a Senior Principal Engineer, in AI Research. Until recently, he was the CTO of Eta Compute, developing energy-efficient AI applications for edge devices. Prior to Eta Compute, Dr. Srinivasa worked at Intel Labs as Chief scientist and Senior Principal Engineer and was the architect for the 14 nm Loihi neuromorphic chip with on-chip learning. Before Intel, he was a Principal Scientist and Director for the Center for Neural and Emergent Systems at HRL Laboratories and served in various capacities including the principal investigator for DARPA programs SyNAPSE, Physical Intelligence, and UPSIDE. He was the Principal Investigator on several programs within HRL on topics ranging from sensing and robotics, adaptive control, autonomous vehicles, and biologically inspired models for both Boeing and General Motors. Dr. Srinivasa has 116 issued patents and published over 100 articles in peer-reviewed journals and conferences. Reports about his work have appeared in The Economist, MIT Technology Review, Wired Magazine, IEEE Spectrum, and Forbes among others. Dr. Srinivasa is a Fellow of the IEEE, has a Ph. D. from the University of Florida, and was a Beckman Post-Doctoral Fellow at the University of Illinois at Urbana-Champaign .

Antonino Tumeo (PNNL)

Dr. Antonino Tumeo received an MS degree in Informatic Engineering (2005) and a PhD in Computer Engineering (2009) from Politecnico di Milano in Italy. Since February 2011, he has been a research scientist in Pacific Northwest National Laboratory’s (PNNL) High-Performance Computing (HPC) group. He joined PNNL in 2009 as a post-doctoral research associate. Previously, he was a post-doctoral researcher at Politecnico di Milano. His research interests include modeling and simulation of high performance architectures, hardware-software codesign, electronic design automation, high-level synthesis, field-programmable gate arrays (FGPA) prototyping, and general-purpose computing on graphics processing units (GPGPU). Antonino is currently the principal investigator of SODALITE (Software Defined Accelerators from Learning Tools Environment), a project under the Real Time Machine Learning program of the Defense Advanced Research Projects Agency related to the automatic generation of machine learning accelerators, and SO(DA)2 (Software Defined Architectures for Data Analytics), a project under the Data-Model Convergence Initiative. The SO(DA)2 project is related to the development of a toolchain for efficient acceleration of emerging HPC applications (integrating scientific simulation with machine learning and data analytics) in the context of novel reconfigurable architectures.

Rickard Ewetz (UCF)

Rickard Ewetz received his MS degree in Applied Physics and Electrical Engineering from Linkoping University, Sweden, in 2011. He received his Ph.D. degree in Electrical and Computer Engineering from Purdue University in 2016. Currently, he is an Associate Professor in the Electrical and Computer Engineering Department at the University of Central Florida. His research interests include artificial intelligence (AI), machine learning (ML), emerging computing paradigms, future computing systems, and physical design. He has published over 65 peer-reviewed papers in top design automation and AI/ML conferences and journals. He has the best paper nominations from ASP-DAC, DATE, and ICCAD. He has been funded by DARPA, DOE, AFRL, NSF, Lockheed Martin Corp, Cyber-Florida, and UCF.

Siddharth Garg (NYU)

Siddharth Garg is currently an Institute Associate Professor of ECE at NYU. He received his Ph.D. degree in Electrical and Computer Engineering from Carnegie Mellon University in 2009, and a B.Tech. degree in Electrical Engineering from the Indian Institute of Technology Madras. He joined NYU in Fall 2014 as an Assistant Professor, and prior to that, was an Assistant Professor at the University of Waterloo from 2010-2014. His research interests are in machine learning, cyber-security, and computer hardware design. He is a member of NYU Center for Cybersecurity and NYU WIRELESS. In 2016, he was listed in Popular Science Magazine’s annual list of “Brilliant 10” researchers. He has received the NSF CAREER Award (2015), best paper awards at the IEEE Symposium on Security and Privacy (S&P) 2016 and the USENIX Security Symposium 2013. His NDSS 2015 paper was selected as a “Top Picks” in Hardware Security in 2019. He also received the Angel G. Jordan Award from ECE department of Carnegie Mellon University.

Puneet Gupta (UCLA) 

Puneet Gupta received the B.Tech. degree in electrical engineering from the Indian Institute of Technology Delhi, New Delhi, India, in 2000, and the Ph.D. degree from the University of California at San Diego, San Diego, CA, USA, in 2007. He is currently a Faculty Member with the Electrical and Computer Engineering Department, University of California at Los Angeles. He Co-Founded Blaze DFM Inc., Sunnyvale, CA, USA, in 2004 and served as its Product Architect until 2007. He has authored over 170 papers, 18 U.S. patents, a book and a book chapter in the areas of design-technology co-optimization as well as variability/reliability aware architectures. Dr. Gupta was a recipient of the NSF CAREER Award, the ACM/SIGDA Outstanding New Faculty Award, SRC Inventor Recognition Award, and the IBM Faculty Award. He currently co-leads the multi-university CDEN+ Center which focuses on future semiconductor technologies.

Jingtong Hu (Pitt)

Jingtong Hu is currently an Associate Professor in the Department of Electrical and Computer Engineering at University of Pittsburgh, Pittsburgh, PA, USA and a consultant for nonprofit organization One Heart Health (1HH). Before that, he was an Assistant Professor at Oklahoma State University from 2013 to 2017. He received his Ph.D. in Computer Science from University of Texas at Dallas in 2013 and his B.E. in Computer Science and Technology from Shandong University, China in 2007. His research interests include embedded systems, on-device AI, digital health. His works have received 2 best paper awards, including the Donald O. Pederson Best Paper Award from IEEE Transactions on Computer-Aided Design of Circuits and Systems and 5 best paper nominations from DAC, ASP-DAC, and ESWEEK, etc. He is also the recipient of University of Pittsburgh William Kepler Whiteford Faculty Fellowship, Employer Diversity Recognition Award, Oklahoma State University Outstanding New Faculty Award, President’s Cup of Promoting Creative Inter-disciplinarity Competition, Air Force Summer Faculty Fellowship, and ACM SIGDA Meritorious Service Award. He has served on the technical program committee of many international conferences such as DAC, DATE, ASP-DAC, ESWEEK, CPS-IoT Week, MLsys, AAAI, etc. He served as a guest editor for Sensors, IEEE Transactions on Computers, ACM Transactions on Cyber-Physical Systems, ACM Transactions on Embedded Systems, and is currently serving as an executive committee member and education chair for ACM SIGDA, associate editor for IEEE Embedded Systems Letters, the Journal of Systems Architecture: Embedded Software Design, and ACM Transactions on Cyber-Physical Systems. His research has been sponsored by NSF, NIH, ARL, AFRL, NSA/LPS, Meta, Amazon, Altera, Singular Medical, etc. 

Priyadarshini Panda (Yale)

Priya Panda is an assistant professor in the electrical engineering department at Yale University, USA. She received her B.E. and Master's degree from BITS, Pilani, India in 2013 and her PhD from Purdue University, USA in 2019. During her PhD, she interned in Intel Labs where she developed large scale spiking neural network algorithms for benchmarking the Loihi chip. She is the recipient of the 2019 Amazon Research Award, 2022 Google Research Scholar Award, 2022 DARPA Riser Award, 2023 NSF CAREER Award. Her research interests lie in Neuromorphic Computing, Spiking Neural Networks, Energy-efficient Accelerators, and In-Memory Computing.

Deirdre Hanford (Synopsys)

Deirdre Hanford serves as the Chief Security Officer for Synopsys. In this role, she works collaboratively to safeguard Synopsys. In addition, she leads efforts to drive industry awareness and enablement for secure design from software to silicon to support our business in EDA, IP and Software Integrity.

She previously served as co-general manager of Synopsys’ Design Group, responsible for leading the development and deployment of our physical design, implementation, and analog/mixed-signal product lines. Deirdre has held a number of positions at Synopsys since joining the company in 1987, including leadership roles in customer engagement, applications engineering, sales, and marketing. She earned a B.S.E.E. from Brown University and an M.S.E.E. from UC Berkeley.

In 2001, Deirdre was a recipient of the YWCA Tribute to Women and Industry (TWIN) Award and the Marie R. Pistilli Women in EDA Achievement Award. Ms. Hanford served as the Chairman of American Electronics Association in 2008.

She currently chairs Brown University's Engineering Advisory Committee and serves on the Engineering Advisory Board for UC Berkeley's College of Engineering. Deirdre also serves on the Board of Directors of Cirrus Logic, Inc.

Ayse Coskun (BU)

Ayse K. Coskun is a full professor at Boston University (BU) at the Electrical and Computer Engineering Department, where she leads the Performance and Energy Aware Computing Laboratory (PeacLab) to solve problems towards making computer systems more intelligent and energy-efficient. Coskun is also the Director of the Center for Information and Systems Engineering (CISE). Coskun’s research interests intersect design automation, computer systems, and architecture. Her research outcomes have been recognized by several technical awards, including the NSF CAREER Award, the IEEE CEDA Ernest Kuh Early Career Award, and an IBM Faculty Award. Following her passion in increasing diversity in STEM fields, Coskun regularly participates in outreach programs at BU and was a founder of the “Advancing Diversity in EDA” (DivEDA) forum. She currently serves as the Deputy Editor-in-Chief of the IEEE Transactions on Computer Aided Design and previously served in the Executive Committees of CEDA and DAC. Coskun received her PhD degree in Computer Engineering from University of California San Diego.

Jiang Hu (TAMU )

Jiang Hu is a professor in the Department of Electrical and Computer Engineering at Texas A&M University. His research interests include design automation of VLSI circuits and systems, computer architecture optimization and hardware security. He has co-authored more than 240 technical papers, co-invented 10 patents and co-edited a book. He received best paper awards at DAC 2001, ICCAD 2011, IEEE International Conference on Vehicular Electronics and Safety 2018, MICRO 2021 and ASPDAC 2023. He served as the technical program chair and general chair of the ACM International Symposium on Physical Design in 2011 and 2012, respectively. He was named an IEEE fellow in 2016. He will be the technical program co-chair for the ACM/IEEE Workshop on Machine Learning CAD 2023. 

Helen Li (Duke) 

Hai “Helen” Li is the Clare Boothe Luce Professor and Department Chair of the Electrical and Computer Engineering Department at Duke University. She received her B.S and M.S. from Tsinghua University and Ph.D. from Purdue University. Her research interests include neuromorphic circuit and system for brain-inspired computing, machine learning acceleration and trustworthy AI, conventional and emerging memory design and architecture, and software and hardware co-design. Dr. Li served/serves as the Associate Editor for multiple IEEE and ACM journals. She was the General Chair or Technical Program Chair of multiple IEEE/ACM conferences and the Technical Program Committee members of over 30 international conference series. Dr. Li is a Distinguished Lecturer of the IEEE CAS society (2018-2019) and a distinguished speaker of ACM (2017-2020). Dr. Li is a recipient of the NSF Career Award, DARPA Young Faculty Award, TUM-IAS Hans Fischer Fellowship from Germany, ELATE Fellowship, nine best paper awards and another nine best paper nominations. Dr. Li is a fellow of ACM and IEEE.

David Z. Pan (UT Austin)

David Z. Pan is a Professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin and holds the Silicon Laboratories Endowed Chair in Electrical Engineering. He received his B.S. degree from Peking University, and his M.S./Ph.D. degrees from University of California at Los Angeles (UCLA). From 2000 to 2003, he was a Research Staff Member with the IBM T. J. Watson Research Center, Yorktown Heights, NY. His research is mainly focused on electronic design automation, synergistic AI/IC co-optimizations, domain-specific accelerators, design for manufacturing, hardware security, and design/CAD for analog/mixed-signal and emerging technologies. He has published over 450 technical papers in refereed journals and conferences, and is the holder of 8 U.S. patents. He has held various advisory, consulting, or visiting positions in academia and industry, such as MIT and Google. He has graduated over 40 PhD/postdoc students at UT Austin who are now holding key academic and industry positions.

He has received the 2013 SRC Technical Excellence Award, DAC Top 10 Author in Fifth Decade, DAC Prolific Author Award, ASP-DAC Frequently Cited Author Award, 20 Best Paper Awards (TCAD 2021, ISPD 2020, ASP-DAC 2020, DAC 2019, GLSVLSI 2018, VLSI Integration 2018, HOST 2017, SPIE-AL 2016, ISPD 2014, ICCAD 2013, ASPDAC 2012, ISPD 2011, IBM Research Pat Goldberg Memorial Best Paper Award 2010 in CS/EE/Math, ASPDAC 2010, DATE 2009, ICICDT 2009, SRC Techcon 2015, 2012, 2007 and 1998), Communications of the ACM Research Highlights (2014), ACM/SIGDA Outstanding New Faculty Award (2005), NSF CAREER Award (2007), UCLA Engineering Distinguished Young Alumnus Award (2009), UT Austin RAISE Faculty Excellence Award (2014), IBM Faculty Award four times, SRC Inventor Recognition Award three times, Cadence Academic Collaboration Award (2019), and a number of international CAD contest awards, among others.  He is a Fellow of ACM, IEEE and SPIE.

Sarma Vrudhula (ASU)

Sarma Vrudhula is a professor in the School of Computing and Augmented Intelligence  at Arizona State University. He received a bachelor's degree in mathematics from the University of Waterloo, Ontario, Canada, in 1976. He received his master's and doctoral degrees in electrical engineering from the University of Southern California in 1980 and 1985, respectively.

During 1985-1992, he was on the faculty of the EE-Systems department of the University of Southern California. From 1992 to 2005, he was a professor in the Electrical and Computer Engineering department at the University of Arizona. During that period, he was the founding director of the NSF UA/ASU Center for Low Power Electronics. He joined ASU in 2005, and became the director for the Center for Embedded Systems at ASU in 2006, which became an NSF IUCRC Center in 2009.  He became a fellow of the IEEE for “contributions to low power and energy-efficient design of digital circuits and systems.”

His work spans several areas in design automation and computer-aided design for digital integrated circuit and systems, focusing on energy management of circuits and systems. Specific topics include: energy optimization of battery powered computing systems and wireless sensor networks; system level dynamic power and thermal management of multicore processors and system-on-chip (SoC); statistical methods for the analysis of process variations; statistical optimization of performance, power and leakage; new circuit architectures of threshold logic circuits for the design of ASICs and FPGAs; technology mapping with threshold logic circuits; the implementation of threshold logic using spintronic devices, and non-Boolean computation in emerging technologies. His teaching experience includes both undergraduate and graduate courses in digital systems design and testing, VLSI design, CAD algorithms for VLSI, advanced synthesis and verification methods, computer architecture, and discrete mathematics.

Qijing Jenny Huang  (NVIDIA Research)

Qijing Jenny Huang is a research scientist at NVIDIA, working on emerging GPU architecture. Her research focuses on accelerated computing and the automation of the hardware, algorithm, and mapping co-optimization to enhance accelerator performance. She has extensive experience in algorithm-hardware codesign for deep learning accelerators, HLS-based design methodology, and ML/ILP-assisted compiler optimization and hardware design space exploration techniques. Prior to joining NVIDIA, she earned her Ph.D. in Computer Science from the University of California, Berkeley and she holds a B.A.S in Electrical and Computer Engineering from the University of Toronto.

Sandhya Koteshwara  (IBM Research)

Sandhya Koteshwara is a Staff Research Scientist at IBM T.J. Watson Research Center in Yorktown Heights, New York. Her research interests include hardware security, cryptographic hardware, secure cloud infrastructure and embedded systems security. She is currently working in the cloud infrastructure department towards bringing principles of zero trust to hardware. She leads the efforts on hardware security for novel heterogeneous integration or chiplet based technology and next generation cloud server architectures. Dr. Koteshwara graduated from the University of Minnesota with a doctorate degree in Electrical and Computer Engineering in 2018. Her thesis work focused on hardware obfuscation, authenticated encryption and low-energy machine learning hardware. She has authored several papers and patents and has been selected as a Young Researcher at Heidelberg Laureate Forum 2018 and participant of the Rising Stars in EECS 2017. 

Frank Liu (ORNL) 

Frank Liu holds a Ph.D. degree in Computer Engineering from Carnegie Mellon University and a M.S degree in Applied Math from University of Minnesota. Currently he is a Distinguished Research Scientist and a Research Manager (Group Leader) at Oak Ridge National Lab. Prior to joining ORNL, he was a Research Staff Member at IBM Research. His research activities span from machine learning, HPC, big data analysis to computer architecture and VLSI microelectronics. He is the recipient of multiple IBM Research Accomplishment Awards, the IEEE Donald Pederson Best Paper Award, Asian and South Pacific Design Automation Conference Best Paper Award. He holds an Adjunct Professor position at Texas A&M University and is a Fellow of IEEE.

Vijay Janapa Reddi (Harvard)  

Vijay Janapa Reddi is the John L. Loeb Associate Professor of Engineering and Applied Sciences at Harvard University. He helped co-found MLCommons, a non-profit organization committed to accelerating machine learning for the benefit of all. Within MLCommons, he serves as Vice President and holds a position on the board of directors. Vijay oversees MLCommons Research, which brings together a diverse team of over 125 researchers from various organizations to provide exploratory value to MLCommons members. He co-led the development of the MLPerf benchmark, which encompasses ML in datacenters, edge computing, mobile devices, and Internet of Things (IoT). Vijay is the recipient of best paper and IEEE Micro TopPicks awards and other accolades, including the Gilbreth Lecturer Honor from the National Academy of Engineering (NAE) and IEEE TCCA Young Computer Architect Award.

Amir Yazdanbakhsh (Google DeepMind) 

Amir Yazdanbakhsh received his Ph.D. degree in computer science from the Georgia Institute of Technology. His Ph.D. work has been recognized by various awards, including Microsoft PhD Fellowship and Qualcomm Innovation Fellowship. Amir is currently a Research Scientist at Google DeepMind where he is the co-founder and co-lead of the Machine Learning for Computer Architecture team. His work focuses on leveraging the recent machine learning methods and advancements to innovate and design better hardware accelerators. He is also interested in designing large-scale distributed systems for training machine learning applications, and led the development of a massively large-scale distributed reinforcement learning system that scales to TPU Pod and efficiently manages thousands of actors to solve complex, real-world tasks. The work of our team has been covered by media outlets including WIRED, ZDNet, AnalyticsInsight, InfoQ. Amir was inducted into the ISCA Hall of Fame in 2023.