Research & Projects
Under construction ...
Sep 2016 – Dec 2017 Accelerating CNNs on FPGAs
University of Southern California Supervisor: Prof. Viktor Prasanna
Sep 2015 – Jun 2016 Cell Image Classification with DCNN
University of Hong Kong Supervisor: Prof. Hayden K.H. So
Implementation of Deep Convolutional Neural Network with Python3
Design of the DCNN structure, achieving 95% accuracy on QPI blood and algae cell images
Acceleration of DCNN’s feed-forward operation on Apache Spark clusters
May 2015 – Aug 2015 FPGA Architecture and CAD Routing
University of Toronto Supervisor: Prof. Vaughn Betz
Architecture experiments on route quality by switch blocks and wire mix exploration
Architecture modification of Stratix IV, capturing accurate channel interconnection
VPR router improvement by a new heuristic look-ahead of A* search. The new algorithm is designed to decrease critical path delay for modern architectures with complex wire mixture, by setting up a timing delay lookup table prior to routing
Maintenance of VPR's switch builder by supporting both uni- and bi-directional wires