Publications

Journal

Bold Our Group Member, * Corresponding Author, = Equal Contribution

• 1. S. Hong, J. E. Seo, E. Park, D. K. Lee, E. Yang, T. Das, J. Y. Kwak*, J. Chang*, “High-Gain and Low-Power nMOS Inverter ......”, submitted.

  2. D. H. Lee, J. Chang*, “Program Gate -Less ......”, submitted.

  3. T. Das, S. Youn, J. E. Seo, E. Yang, J. Chang*, “Large-Scale Complementary Logic Circuit Enabled by Al2O3 Passivation-Induced Carrier Polarity Modulation in Tungsten Diselenide”,accepted for publication in ACS Applied Materials & Interfaces. [Link]

  4. S. Youn, J. Chang*, “Computational Analysis of Metal Contact on Bi2O2Se with Se Surface Vacancies”, Advanced Electronic Materials, 9, 2201221 (2023). [Link]

  5. E. Park=, J. E. Seo=, G. Noh, Y. Jo, I. S. Kim, J. Park, J. Kim, Y. Jeong, S. Lee, I. Kim, J.-K. Park, S. Kim, J. Chang*, J. Y. Kwak*, “Pentagonal 2D Layered PdSe2-based Synaptic Device with Graphene Floating Gate”, Journal of Materials Chemistry C, 10, 16536–16545 (2022). [Link]

  6. J. E. Seo, E. Park, J. Y. Kwak*, J. Chang*, “Demonstration of PdSe2 CMOS Using Same Metal Contact in PdSe2 n-/p-MOSFETs through Thickness-Dependent Phase Transition”, Advanced Electronic Materials, 8, 2200485 (2022). [Link]

  7. C. H. Lee, Y. Park, S. Youn, M. J. Yeom, H. S. Kum, J. Chang, J. Heo*, G. Yoo*, “Design of p-WSe2/n-Ge Heterojunctions for High-Speed Broadband Photodetectors”, Advanced Functional Materials, 32, 2107992 (2022). [Link]

  8. A. Hwang, M. Park, Y. Park, Y. Shim, S. Youn, C. H. Lee, H. B. Jeong, H. Y. Jeong, J. Chang, K. Lee*, G. Yoo*, J. Heo*, “Visible and infrared dual-band imaging via Ge/MoS2 van der Waals heterostructure”, Science Advances, 7 (2021). [Link]

  9. J. E. Seo, T. Das, E. Park, D. Seo, J. Y. Kwak*, J. Chang*, “Polarity Control and Weak Fermi-Level Pinning in PdSe2 Transistor”, ACS Applied Materials & Interfaces, 13, 43480-43488 (2021). [Link]

  10. E. Yang, K. R. Kim, J. Chang*, “Theoretical Evaluation of Two-Dimensional Ferroelectric Material CuInP2S6 for Ferroelectric Tunnel Junction Device”, IEEE Electron Device Letters, vol. 42, no. 10, pp. 1472-1475 (2021). [Link]

  11. V. A. Cao, M. Kim, W. Hu, S. Lee, S. Youn, J. Chang, H. S. Chang, J. Nah*, "Enhanced Piezoelectric Output Performance of the SnS2/SnS Heterostructure Thin-Film Piezoelectric Nanogenerator Realized by Atomic Layer Deposition", ACS Nano, 15, 10428-10436 (2021). [Link]

  12. D. Seo=, J. E. Seo=, T. Das, J. Y. Kwak*, J. Chang*, “Gate-Controlled  Rectifying Direction in PdSe2 Lateral Heterojunction Diode”, Advanced Electronic Materials, 7, 2100005 (2021). [Link]

  13. T. Das, E. Yang, J. E. Seo, J. H. Kim, E. Park, M. Kim, D. Seo, J. Y. Kwak*, J. Chang*, “Doping-Free All PtSe2 Transistor via Thickness-Modulated Phase Transition”, ACS Applied Materials & Interfaces, 13, 1861-1871 (2021). [Link]

  14. E. Park, M. Kim, T. S. Kim, I. S. Kim, J. Park, J. Kim, Y. Jeong, S. Lee, I. Kim, J. Park, G. T. Kim, J. Chang*, K. Kang*, J. Y. Kwak*, “A 2D Material-based Floating Gate Device with Linear Synaptic Weight Update”, Nanoscale 12, 24503-24509 (2020). [Link]

  15. S. Kim, J. Y. Park, J. Chang*, K. R. Kim*, “Scaling and Variation Predictions for Silicon Fin-Based High Electron Mobility Transistor”, IEEE Electron Device Letters, vol. 41, no. 11, pp. 1621-1624 (2020). [Link]

  16. E. Yang, J. E. Seo, D. Seo, J. Chang*, “Intrinsic limit of contact resistance in the lateral heterostructure of metallic and semiconducting PtSe2”, Nanoscale 12, 14636-14641 (2020). [Link]

  17. T. Das, D. Seo, J. E. Seo, J. Chang*, “Tunable Current Transport in PdSe2 Via Layer-by-Layer Thickness Modulation by Mild Plasma”, Advanced Electronic Materials, 6, 2000008 (2020). [Link]

  18.  J. E. Seo, D. Seo, J. Chang*, “Theoretical Analysis on Ballistic Current Transport in Monolayer Black Arsenic MOSFETs”, IEEE Transactions on Electron Devices, vol. 67, no. 2, pp. 622-626 (2020). [Link]

  19. J. W. Jeong, Y. E. Choi, W. S. Kim, J. H. Park, S. Kim, S. Shin, K. J. Lee, J. Chang, S. J. Kim, and K. R. Kim*, “Tunneling-based ternary metal-oxide-semiconductor technology”, Nature Electronics 2, 307–312 (2019). [Link]

  20. D. Seo, J. Chang*, “Doping-Free Arsenene Heterostructure Metal-Oxide-Semiconductor Field Effect Transistors Enabled by Thickness Modulated Semiconductor to Metal Transition in Arsenene”, Scientific Reports 9, 3988 (2019). [Link]

  21.  J. Chang*, “Novel Antimonene Tunneling Field-Effect Transistors Using Abrupt Transition of Semiconductor to Metal in Monolayer and Multilayer Antimonene Heterostructure”, Nanoscale 10, 13652 (2018). [Link]

  22. P. Sarangapani*, C. Weber, J. Chang, S. Cea, M. Povolotskyi, G. Klimeck, T. Kubis, “Atomistic tight-binding study of contact resistivity in Si/SiGe PMOS Schottky contacts”, IEEE Transactions on Nanotechnology, vol. 17, no. 5, pp. 968-973 (2018). [Link]

  23. A. Valsaraj*, J. Chang, A. Rai, L. F. Register, E. Tutuc, S. K. Banerjee, “Theoretical and experimental investigation of vacancy-based doping of monolayer MoS2 on oxide”, 2D Materials 2 (4), 045009 (2015). [Link]

  24. A. Rai*, A. Valsaraj, H. CP Movva, A. Roy, R. Ghosh, S. Sonde, S. Kang, J. Chang, T. Trivedi, R. Dey, S. Guchhait, S. Larentis, L. F. Register, E. Tutuc, S. K. Banerjee, “Air Stable Doping and Intrinsic Mobility Enhancement in Monolayer Molybdenum Disulfide by Amorphous Titanium Suboxide Encapsulation”, Nano Letters 15 (7), 4329 (2015). [Link]

  25. J. Chang*, “Modeling of anisotropic two-dimensional materials monolayer HfS2 and phosphorene metal-oxide semiconductor field effect transistors“, Journal of Applied Physics 117, 214502 (2015). [Link]

  26. J. Chang*, “Simulation of channel orientation dependent transport in ultra-scaled monolayer MoX2 (X = S, Se, Te) n-MOSFETs“, Journal of Physics D: Applied Physics  48, 145101 (2015). [Link]

  27. J. Chang*, C. Hobbs, “Theoretical Study of Phosphorene Tunneling Field Effect Transistors”, Applied Physics Letters 106, 083509 (2015). [Link]

  28. J. Chang*, S. Larentis, E. Tutuc, L.F. Register, S. K. Banerjee, “Atomistic Simulation of the Electronic States of Adatoms in Monolayer MoS2”, Applied Physics Letters 104, 141603 (2014). [Link]

  29. J. Chang*, L.F. Register, S. K. Banerjee, “Ballistic Performance Comparison of Monolayer Transition Metal Dichalcogenide MX2 (M = Mo, W; X = S, Se, Te) MOSFETs”, Journal of Applied Physics 115, 084506 (2014). [Link]

  30. J. Chang*, L.F. Register, S. K. Banerjee, “Atomistic Full-Band Simulations of Monolayer MoS2 Transistor”, Applied Physics Letters 103, 223509 (2013). [Link]

  31. J. Chang*, L.F. Register, S. K. Banerjee, “Topological Insulator Bi2Se3 Thin Films as an Alternative Channel Material in MOSFETs”, Journal of Applied Physics 112, 124511 (2012). [Link]

  32. J. Chang, P. Jadaun, L.F. Register, S. K. Banerjee, B. Sahu*, “Dielectric Capping Effects on Binary and Ternary Topological Insulator Surface States”, Physical Review B 84.155105 (2011). [Link]

  33. J. Chang, L. F. Register, S. K. Banerjee, B. Sahu*, “Density Functional Study of Ternary Topological Insulator Thin Films”, Physical Review B 83, 235108 (2011). [Link]

  34. J. Chang*, A. Kapoor, L. F. Register, S. K. Banerjee, “Analytical Models of Short-Channel Double Gate JFETs”, IEEE Transactions on Electron Devices, vol. 57, no. 8, pp. 1846-1855 (2010). [Link]

Conference

Bold Our Group Member, * Corresponding Author

• 1. D. Seo, J. E. Seo, T. Das, J. Y. Kwak, J. Chang*, “Thickness-Dependent Transport in PdSe2 Field-Effect-Transistors”, AWAD, Jul 1-3, 2019, Busan, Korea.

  2. J. Chang*, “Tunneling Field-Effect Transistors Utilizing Thickness Modulated Semiconductor to Metal Transition in Two-Dimensional Materials”, AWAD, Jul 2-4, 2018, Kitakyushu, Japan.

  3.  P. Sarangapani*, C. Weber, J. Chang, S. Cea, R. Golizadeh-Mojarad, M. Povolotskyi, G. Klimeck, T. Kubis, “Assessment of Si/SiGe PMOS Schottky contacts through atomistic tight binding simulations: Can we achieve the 10−9 Ω.cm2 target ?”, IEEE-NANO, Jul 25-28, 2017, Pittsburgh, PA, U.S.A.

  4. A. Valsaraj*, J. Chang, L. F. Register, S. K. Banerjee, “Substitutional Doping of Metal Contact for Monolayer Transition Metal Dichalcogenides: a Density Functional Theory Based Study”, SISPAD, Sep 9-11, 2015, Washington DC, U.S.A.

  5. A. Valsaraj*, J. Chang, L. F. Register, S. K. Banerjee, “Density-Functional-Theory-Based study of monolayer MoS2 on Oxide”, SISPAD, Sep 9-11, 2014, Yokohama, Japan.

  6. A. Valsaraj,* J. Chang, L. F. Register, S. K. Banerjee, “DFT Study of the Effect of HfO2 on Monolayer MoS2”, ICPS, Aug 10-15, 2014, Austin, TX, U.S.A.

  7. A. Valsaraj*, J. Chang, L. F. Register, S. K. Banerjee, “Effect of HfO2 and Al2O3 on monolayer MoS2 electronic structure”, DRC, Jun 22-25 , 2014, Santa Barbara, CA, U.S.A.

  8. J. Chang*, L. F. Register, S. K. Banerjee, “Comparison of Ballistic Transport Characteristics of Monolayer Transition Metal Dichalcogenides (TMDs) MX2 (M =  Mo, W; X = S, Se, Te) n-MOSFETs”, SISPAD, Sep 3-5, 2013, Glasgow, Scotland, U.K.

  9. J. Chang*, L. F. Register, S. K. Banerjee, “Full-Band Quantum Transport Simulations of Monolayer MoS2 Transistors: Possibility of Negative Differential Resistance”, DRC, Jun 23-26 , 2013, Notre Dame, IN, U.S.A.

  10. J. Chang*, L. F. Register, S. K. Banerjee, “Computational Study of Tunnel FETs Based on Topological Insulator Bi2Se3”, Techcon 2012, Sep 10-11, 2012, Austin, TX. U.S.A. [Best in Session Paper Award]

  11. J. Chang*, L. F. Register, S. K. Banerjee, “Atomistic Quantum Transport Simulation of Topological Insulator Bi2Se3 Tunnel FETs”, SISPAD, Sep 5-7, 2012, Denver, CO, U.S.A.

  12. J. Chang*, L. F. Register, S. K. Banerjee, “Possible Applications of Topological Insulator for Tunnel FETs”, DRC, Jun 18-20 , 2012, University Park, PA, U.S.A.

  13. J. Chang*, L. F. Register, S. K. Banerjee, B. Sahu, “Thin Film Electronic Properties of Ternary Topological Insulator”, 2011 MRS Fall Meeting, Nov 28-Dec 2 , 2011, Boston, MA, U.S.A.

  14. J. Chang*, L. F. Register, S. K. Banerjee, B. Sahu, “Effect of Dielectric Materials on the Topological Insulator Bi2Se3 Surface States“, Techcon 2011, Sep 12-13, 2011, Austin, TX. U.S.A.

  15. B. Sahu*, J. Chang, P. Jadaun, L. F. Register, S. K. Banerjee, A. H. MacDonald, “Surface States of Three-Dimensional Topological Insulators: How Robust are They?“, 2011 MRS Spring Meeting, Apr 25-29, 2011, San Francisco, CA, U.S.A.

  16. J. Chang*, L. F. Register, S. K. Banerjee, B. Sahu, “Effect of Dielectric Materials on the Topological Insulator Bi2Se3 Surface States”, 2011 APS March Meeting, Mar 21-25 , 2011, Dallas, TX, U.S.A.