This is a general page for information on Mixed-Criticality Systems research at the Real-Time Systems Group of the Department of Computer Science at the University of York.

An increasingly important trend in the design of real-time and embedded systems is the integration of components with different levels of criticality onto a common hardware platform. At the same time, these platforms are migrating from single cores to multi/many-cores and cyber-physical systems. Criticality is a designation of the level of assurance against failure needed for a system component. A mixed criticality system is one that has two or more distinct levels (for example safety critical, mission critical and low-critical).

Funded Research Projects On Mixed Criticality Systems

Industrial advisors

Publications

Literature review

A Review of published work on Mixed Criticality Systems is available; it attempts to include all relevant publications up to March 2019. This is the twelfth version of this review. If there are any corrections/additions please send to Alan Burns.

MCC Review 2019 v12 (PDF, 411KB)


Publications

2019

2018

2017

  • A. Burns and R.I. Davis: A Survey of Research into Mixed Criticality Systems, ACM Computing Surveys, 2017 (link to ACM DL)
  • A. Burns and R.I. Davis: Response Time Analysis for Mixed Criticality Systems with Arbitrary Deadlines, Proc. of the Workshop on Mixed Criticality (WMC), IEEE Real-Time Systems Symposium (RTSS), 2017 (link to proceedings)
  • C. Deutschbein, T. Fleming, A. Burns, S. Baruah: Multi-core Cyclic Executives for Safety-Critical Systems, Int Symposium on Dependable Software Engineering: Theories, Tools, and Applications (SETTA), 2017, Lecture Notes in Computer Science 10606 (link to LNCS)
  • L. S. Indrusiak, J. Harbin and M. J. Sepulveda: Side-Channel Attack Resilience through Route Randomisation in Secure Real-Time Networks-on-Chip, Proc. of the 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2017 (link to IEEE Xplore)
  • T. Fleming, H. M. Huang, A. Burns, C. D. Gill, S. Baruah, C. Lu: Corrections to and Discussion of "Implementation and Evaluation of Mixed-criticality Scheduling Approaches for Sporadic Tasks", ACM Transactions on Embedded Computing Systems, 2017 (link to ACM DL)
  • A. Burns, S. Baruah: Migrating Mixed Criticality Tasks Within a Cyclic Executive Framework, Proc. of Ada-Europe Int Conference on Reliable Software Technologies, 2017, Lecture Notes in Computer Science 10300 (link to LNCS)
  • I. Bate, A. Burns and R.I. Davis: An Enhanced Bailout Protocol for Mixed Criticality Embedded Software, IEEE Transactions on Software Engineering, 2017 (link to IEEE Xplore)

2016

  • S. Baruah, A. Burns and Z. Guo: Scheduling mixed-criticality systems to guarantee some service under all non-erroneous behaviors, Euromicro Conference on Real-Time Systems (ECRTS), 2016 (PDF, 224kb)
  • N. C. Audsley, M. Gonomy, J. Garside, B. Akesson and K. Goossens: A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems, IEEE Transactions on Computers, 2016 (link to IEEE Xplore)
  • D. Maxim, R.I. Davis, L. Cucu-Grosjean and A. Easwaran: Probabilistic Analysis for Mixed Criticality Scheduling with SMC and AMC, Proceedings of the Workshop on Mixed Criticality Systems (WMC), 6th Dec 2016 (PDF, 263kb)
  • T. Fleming and A. Burns: Utilising Asymmetric Parallelism in Multi-Core MCS Implemented via Cyclic Executives, Proceedings of Workshop on Mixed Criticality, IEEE Real-Time Systems Symposium (RTSS), 2016 (PDF, 339kb)
  • C. Evripidou and A. Burns: Scheduling for Mixed-criticality Hypervisor Systems in the Automotive Domain, Proceedings of Workshop on Mixed Criticality, IEEE Real-Time Systems Symposium (RTSS), 2016 (PDF, 368kb)
  • T. Fleming and S. Baruah and A. Burns: Improving the Schedulability of Mixed Criticality Cyclic Executives via Limited Task Splitting, Proceedings of the 24th International Conference on Real-Time Networks and Systems (RTNS), 2016 (PDF, 480kb)

2015

2014

2013

2011

Invited talks

Invited talks from York on the topic of Mixed Criticality Systems:

  • I. Bate and Stephen Law: Keynote on Challenges in Applying Mixed-Criticality Systems to Aircraft Engine Control Systems, Workshop on Mixed Criticality (WMC), Paris, France, December 2017.
  • A. Burns: Defining and Delivering Resilience in Mixed-Criticality Systems, Workshop on Mixed Criticality (WMC), Paris, France, December 2017.
  • L.S. Indrusiak: Keynote on Networks-on-Chip for Real-Time and Mixed-Criticality Applications, 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), Madrid, Spain, July 2017.
  • L.S. Indrusiak: Keynote on Priority-based Wormhole Networks-on-Chip: challenges and opportunities, 15th International Workshop on Real-Time Networks (RTN), Dubrovnik, Croatia, June 2017.
  • L.S. Indrusiak: Keynote on Network-on-Chip Platforms for Real-Time Mixed-Criticality Applications, 23rd International Conference on Real-Time Networks and Systems (RTNS), Lille, France, November 2015.
  • A. Burns: Emergent issues in the adoption of multi core processors, BAE Systems Community of Practice Workshop, September 2015.
  • L.S. Indrusiak: Real-Time Mixed-Criticality Network-on-Chip Resource Allocation, Workshop on Dependable Many-Core Computing (DMCC), Amsterdam, Netherlands, July 2015.
  • A. Burns: Keynote on Mixed Criticality, Dagstuhl Seminar on Mixed Criticality on Multicore/Manycore Platforms, March 2015.
  • A. Burns: Mixed Criticality and Many-Core Platforms, University of Graz, Austria, September 2014.
  • A. Burns: Mixed Criticality and Many-Core Platforms, The High Integrity Software Conference (HIS), Bristol, UK, October 2014.

Workshops and Seminars

International Workshops and seminars organised by researchers at York on the topic of Mixed Criticality Systems: