Education

• Ph.D. Student in Electrical & Electronic  Engineering, Yonsei Univ., Seoul, March 2024 - Present

• B.S. in Electrical & Electronic Engineering, Yonsei Univ., Seoul, February 2024

Publications

• S.-H.Cho, T.-M. Park, J.-Y. Lee, J.-Y. Hong, A. Gerstlauer, and J.-S. Yang, "Explainable GNN-driven Test Point Insertion on Uncontrollable I/Os", Design, Automation and Test in Europe Conference and Exhibition (DATE) , 2026

• P. Pham*, T.-M. Park*, S.-H. Cho, T. Mahmood, J.-S. Yang, and J. Chung, "AGD: Analytic Gradient Descent for Discrete Optimization in EDA and its Use to Gate Sizing",  ACM Transactions on Design Automation of Electronic Systems, 2025