Publications

Variation Resilient Schemes and Approximation-Free Offset Compensation for Reliable ReRAM-based DNN Accelerators

IEEE Transactions on Emerging Topics in Computing, 2026

J.-W. Jang, J. Oh, S.-H. Cho, J.-Y. Hong, M. Imran, J. Chung and J.-S. Yang  

Accelerating Retrieval Augmented Language Model via PIM and PNM Integration

IEEE/ACM International Symposium on Microarchitecture (MICRO), 2025

J.-W. Jang, J. Oh, Y. Kong, J.-Y. Hong, S.-H. Cho, J. Lee, H. Yang, and J.-S. Yang

Reducing Errors and Powers in LPDDR for DNN Inference: A Compression and IECC-Based Approach

Journal of Systems Architecture, 2025

J.-Y. Hong, J.-W. Jang, S.-H. Cho, Y. Kong, S. Kim, Y. Kang, J. Ko, J. Chung and J.-S. Yang

LOCo: LPDDR Optimization with Compression and IECC scheme for DNN Inference

IEEE International Symposium on Low-Power Electronics and Design (ISLPED), 2024 (Received Best Paper Award)

J. -Y. Hong, S. Kim, J.-W. Jang and J.-S. Yang

VECOM: Variation-Resilient Encoding and Offset Compensation Schemes for Reliable ReRAM-Based DNN Accelerator

ACM/IEEE International Conference On Computer Aided Design (ICCAD),  2023

J.-W. Jang, T. H. Nguyen, and J.-S. Yang,