Education

• Ph.D. Student in Electrical & Electronic  Engineering, Yonsei Univ., Seoul, March 2023 - Present

• B.S. in Electrical & Electronic Engineering, Yonsei Univ., Seoul, February 2023

Publications

• J.-W. Jang, J. Oh, S.-H.Cho, J.-Y. Hong, M. Imran, J. Chung and J.-S. Yang, "Variation Resilient Schemes and Approximation-Free Offset Compensation for Reliable ReRAM-based DNN Accelerators", IEEE Transactions on Emerging Topics in Computing, 2026

• S.-H.Cho, T.-M. Park, J.-Y. Lee, J.-Y. Hong, A. Gerstlauer, and J.-S. Yang, "Explainable GNN-driven Test Point Insertion on Uncontrollable I/Os", Design, Automation and Test in Europe Conference and Exhibition (DATE) , 2026

• J.-W. Jang, J. Oh, Y. Kong, J.-Y. Hong, S.-H. Cho, J. Lee, H. Yang, and J.-S. Yang, "Accelerating Retrieval Augmented Language Model via PIM and PNM Integration", IEEE/ACM International Symposium on Microarchitecture (MICRO), 2025

• J.-Y. Hong, J.-W. Jang, S.-H. Cho, Y. Kong, S. Kim, Y. Kang, J. Ko, J. Chung and J.-S. Yang, "Reducing Errors and Powers in LPDDR for DNN Inference: A Compression and IECC-Based Approach", Journal of Systems Architecture, 2025

• J. -Y. Hong, S. Kim, J.-W. Jang and  J.-S. Yang, "LOCo: LPDDR Optimization with Compression and IECC scheme for DNN Inference", IEEE International Symposium on Low-Power Electronics and Design (ISLPED), 2024 (Received Best Paper Award)

• I. Choi, J.-Y. Hong, J. Jeon, and J.-S. Yang, “RQ-DNN: Reliable Quantization for Fault-tolerant Deep Neural Network,” ACM/IEEE Design Automation Conference Late Breaking Results (DAC), 2023

• J. Jeon, J.-Y. Hong, S. Kim, I. Choi, and J.-S. Yang, “PIE-DRAM: Postponing IECC to Enhance DRAM performance with access table,” ACM/IEEE Design Automation Conference Late Breaking Results (DAC), 2023