Yuanlong Li

Ph.D. student @ EPFL

Hello!

I am a fifth-year Ph.D. student in the School of Computer and Communication Sciences (IC) at École Polytechnique Fédérale de Lausanne (EPFL). I am advised by Prof. Babak Falsafi and am affiliated with the Parallel Systems Architecture Lab (PARSA).

I am broadly interested in systems and cross-stack research problems in modern, large-scale datacenters. I mainly work on the hardware side, but I also keep an eye on software and AI. My current research focuses on designing high-performance and secure Function-as-a-Service (FaaS) serverless systems in datacenters. I am one of the main PhD students in the Intel-funded project Midgard, aiming at redesigning virtual memory for higher performance and efficiency of datacenter servers.

I am currently open to the job market. Please contact me: yuanlong.li@epfl.ch. You can find my CV here.

Education

Doctor of Philosophy, École Polytechnique Fédérale de Lausanne (EPFL), Sep. 2020 - Present
- School of Computer and Communication Sciences (IC)
- Advisor: Prof. Babak Falsafi
Master of Science, Harbin Institute of Technology (HIT), Sep. 2014 - Jul. 2016
- Particle Physics and Nuclear Physics, School of Physics
- Advisor: Prof. Jingbo Zhang
Bachelor of Engineering, Harbin Institute of Technology (HIT), Sep. 2010 - Jul. 2014
- Electronic Engineering, School of Astronautics

Publications

Yuanlong Li, Atri Bhattacharyya, Madhur Kumar, Abhishek Bhattacharjee, Yoav Etsion, Babak Falsafi, Sanidhya Kashyap, and Mathias Payer. 2025. Single-Address-Space FaaS with Jord. In Proceedings of the 52nd Annual International Symposium on Computer Architecture (ISCA ’25), June 21-25, 2025, Tokyo, Japan.
Madhur Kumar, Yuanlong Li, Yoav Etsion, Abhishek Bhattacharjee, Arkaprava Basu, Babak Falsafi, Sanidhya Kashyap, and Mathias Payer. 2025. Rethinking IOMMU for Future IO Devices. In the 7th Young Architect Workshop (YArch ’25), March 30, 2025, Rotterdam, Netherlands.
Siddharth Gupta*, Yuanlong Li*, Qingxuan Kang, Abhishek Bhattacharjee, Babak Falsafi, Yunho Oh, and Mathias Payer. 2023. Imprecise Store Exceptions. In Proceedings of the 50th Annual International Symposium on Computer Architecture (ISCA ’23), June 17–21, 2023, Orlando, FL, USA. (* Equal contribution)
- Paper
Atri Bhattacharyya, Florian Hofhammer, Yuanlong Li, Siddharth Gupta, Andres Sanchez, Babak Falsafi, and Mathias Payer. 2023. SecureCells: A Secure Compartmentalized Architecture. In Proceedings of the 44th IEEE Symposium on Security and Privary (IEEE S&P 2023), May 22–24, San Francisco, CA, USA.
- Paper

Work Experience

Senior Engineer, StarFive Technology Co., Ltd., Feb. 2020 - Sep. 2020
- Senior Engineer
- Designer of Load/Store Unit (LSU) and L2 cache controller (L2C) of SiFive China’s first server CPU
Engineer, ARM Technology China Co., Ltd., Mar. 2019 - Jan. 2020
- Engineer
- Designer of the cryptographic co-processor for ARMv8-M CPUs
Advanced Senior ASIC Design Engineer, Unisoc Technologies Co., Ltd., Aug. 2016 - Mar. 2019
- Advanced Senior ASIC Design Engineer
- Designer of L1/L2 TLBs of Unisoc’s second CPU
- Full-system verification, emulation, FPGA prototyping, and post-silicon validation of Unisoc’s CPUs

Contact

Email
- yuanlong.li@epfl.ch
Address
- EPFL IC IINFCOM PARSA
- INJ 216 (Bâtiment INJ), Station 14
- CH-1015 Lausanne, Switzerland

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