Vending Machine

Vending Machine Project Using Verilog

Introduction

The vending machine is a staple of modern convenience, providing an automated way to dispense products like snacks, beverages, or other small items. This project is a Verilog-based implementation of a simple vending machine that uses a Finite State Machine (FSM) design to simulate the functionality of such a system. Designed for educational and experimental purposes, this project demonstrates the principles of digital logic design, state transitions, and hardware description using Verilog.

Project Objective

The primary objective of this project is to design and implement a vending machine system that:

1. Accepts user input in the form of money (₹5 and ₹10 denominations).

2. Dispenses items when the required amount is inserted.

3. Returns appropriate change in case of overpayment.

4. Operates efficiently using FSM principles to handle state transitions.

This project is suitable for anyone learning digital logic design, FSM concepts, or hardware description languages like Verilog.

How It Works

The vending machine operates in three states:

1. IDLE (Initial State):

   • Waits for user input (money insertion).

   • Transitions to the next state based on the amount inserted (₹5 or ₹10).

2. FIVE_RUPEES:

   • If no additional money is inserted, the machine returns ₹5 as change and transitions back to IDLE.

   • If ₹10 is inserted, the machine dispenses an item and returns to IDLE.

3. TEN_RUPEES:

   • Dispenses an item immediately and transitions back to IDLE.

   • Returns excess change (if any) when more than ₹10 is inserted.

System Design

1. Inputs:

   • clk: The clock signal for synchronous state transitions.

   • reset: Resets the machine to its initial state.

   • inp: A 2-bit signal representing the money inserted:

     • 00 → No money inserted.

     • 01 → ₹5 inserted.

     • 10 → ₹10 inserted.

2. Outputs:

   • out: A 1-bit signal indicating whether an item is dispensed (1 for dispensed, 0 otherwise).

   • change: A 2-bit signal representing the change returned:

     • 00 → No change.

     • 01 → ₹5 change.

     • 10 → ₹10 change.

3. FSM Design:

   • State Encoding:

     • IDLE → 2'b00

     • FIVE_RUPEES → 2'b01

     • TEN_RUPEES → 2'b10

   • The state transitions are governed by user inputs and the current state of the system.

4. Output Logic:

   • Defined based on the current state and input.

   • Ensures correct dispensing of items and accurate calculation of change.

Applications

• Educational Use:

  • A practical project for students learning Verilog and FSM design.

  • Demonstrates state transitions and synchronous logic design.

• Simulation and Prototyping:

  • Can be used as a foundational design for more complex vending machines.

  • Simulatable on tools like Xilinx Vivado, ModelSim, or Cadence.

• FPGA Implementation:

  • Deployable on FPGA boards for physical demonstrations, making it a stepping stone for IoT-integrated vending systems.

Key Features

• Simple FSM-based design for ease of understanding and simulation.

• Accepts ₹5 and ₹10 denominations and handles change efficiently.

• Scalable to support additional features like multi-item selection, display integration, or cashless payment systems.

• Fully synchronous design with reset functionality for reliable operation.

Challenges and Solutions

• Change Calculation:

  • Ensuring that the correct change is returned based on input and current state was handled using precise combinational logic.

• State Transition Design:

  • The FSM logic was carefully crafted to handle all possible scenarios (e.g., overpayment, no payment, or invalid input).

• Code Optimization:

  • Outputs (out and change) were assigned default values to avoid latch inference and improve synthesis results.

Learning Outcomes

Through this project, students and enthusiasts can gain hands-on experience in:

• Understanding and implementing Finite State Machines (FSMs).

• Designing and simulating digital systems using Verilog HDL.

• Applying FSM principles to solve real-world automation problems.

• Using tools like ModelSim or Vivado for simulation and verification.

Future Enhancements

• Multi-Item Support: Allow the machine to offer multiple items with different prices.

• User Interface: Integrate an LCD or LED display to show user messages and item prices.

• Cashless Payments: Add support for card or mobile payment systems.

• IoT Integration: Enable remote monitoring and control using Internet of Things (IoT) technologies.

• Real-Time Error Handling: Handle cases like insufficient change or out-of-stock items dynamically.

Why This Project?

This project bridges the gap between theoretical concepts of digital electronics and practical implementation. It serves as an excellent example of how FSM principles can be applied to design real-world systems. Whether you're a student, an aspiring hardware designer, or an electronics enthusiast, this project offers valuable insights into Verilog programming and digital design.