Aim and Scope:

Hardware accelerated artificial intelligence (AI) is now becoming ubiquitous, shifting from clouds to resource-limited embedded and IoT platforms. While hardware accelerators facilitate fast and energy-efficient neural network operations that are both memory and computational intensive, they are facing two fundamental challenges in practice. The first is unreliable inference caused by passive hardware faults in traditional CMOS-based accelerator memories, buffers and computation units, as well as the imperfect manufacturing and non-ideal device behaviors of emerging post CMOS processing-in-memory (PIM) accelerators. The second challenge is the violation of AI integrity and confidentiality caused by fault injection attacks and/or side channel attacks targeting these new NN hardware accelerators.

The goal of this workshop is to establish a forum for the discussion on state-of-the-art research in AI accelerator design from the aspects of reliability and security, which are two sides of the same coin - the unexpected accelerator behavior can be induced by either hardware faults or malicious attacks. The topics include but are not limited to:

• Characterization, modeling, and analysis of transient and permanent faults in AI accelerators;

• Certifying and monitoring the healthiness of accelerators in real-time;

• Self-testing and self-healing accelerator design;

• Fault injection attacks and defenses in NN accelerators;

• Side-channel attacks and defenses in NN accelerators;

• Security-aware AI accelerator design;

• Hardware and software co-defense of embedded machine learning.

The workshop will be held on ZOOM. Please go to www.esweek.org for more details.

Register Here

Online registration is available in Whova

https://whova.com/portal/registration/eswe_202110/

Registration is free with ESWEEK registration

ESWeek registration fee:

• IEEE/ACM member: $10.00

• Non IEEE/ACM member: $20.00

Eligibility

The workshop will invite researchers who have published works in the broad area of neural network reliability and security during the period of 1/1/2018–12/31/2020 to present their most recent work in ESWEEK 2021. Invited talks will be selected from conference papers that have appeared in leading embedded systems, machine learning, design automation, and security conferences, including but not limited to CODES, CASES, EMSOFT, DAC, DATE, ICCAD, HOST, MICRO, ISCA, Usenix Security, ACM CCS, ASIA CCS, Security & Privacy (Oakland), and NDSS.

Important Dates

Submission Deadline: 8/31/2021

Author Notification: 9/20/2021

Presentation Date: 10/14/2021