- I am interested in bridging the gap between pure-research and application. My research interests cover memory systems, virtualization, and system security. I have studied solving TLB reach problem in future memory systems. Currently, I am focusing on lowering the cost on memory in collaboration with Microsoft Research Asia.
- Ph.D. Student/Research Assistant, Computer Science, KAIST, Mar. 2016 - present
- Advisor: Jaehyuk Huh
- GPA: 3.97/4.3
- Master of Science, Computer Science, KAIST, Mar. 2014 - Feb. 2016
- Advisor: Jaehyuk Huh
- GPA: 4.04/4.3
- Thesis: "Dynamic Time Slice Management Based on Cpupool in Virtualized Systems"
- Bachelor, Computer Engineering, Sungkyunkwan University, Mar. 2010 - Feb. 2014
- GPA: 4.44/4.5, Rank: 1/105
- Bachelor, Business Administration, Sungkyunkwan University, Mar. 2010 - Feb. 2014
- GPA: 4.44/4.5
- Jeongseob Ahn, Chang Hyun Park, Taekyung Heo, and Jaehyuk Huh, "Accelerating Critical OS Services in Virtualized Systems with Flexible Micro-sliced Cores", in Proceedings of the 13th European Conference on Computer Systems (EuroSys), April, 2018.
- Chang Hyun Park, Taekyung Heo, Jungi Jeong, Jaehyuk Huh, “Hybrid TLB Coalescing: Improving TLB Translation Coverage under Diverse Fragmented Memory Allocations,” in Proceedings of the 44th International Symposium on Computer Architecture (ISCA), Toronto, Canada, June 2017.
- Chang Hyun Park, Taekyung Heo, Jaehyuk Huh, “Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching,” in Proceedings of the 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, June 2016.
- Improving Address Translation Coverage with HW-SW Hybrid TLB Coalescing
- Proposed a mechanism to encode page contiguity in page table entries to increase the TLB coverage.
- Solved the trade-offs in prior studies in terms of cost, flexibility, and scalability.
- Published in ISCA 2017
- Improving Address Translation Capability with Virtual Caching and Delayed Segment Translation
- Solved TLB scaling problem by proposing a virtual caching architecture backed with delayed segment address translation.
- Published in ISCA 2016
- Dynamic Time Slice Management based on Cpupool in Virtualized Systems
- Solved synchronization problem in virtualized systems by scheduling VMs with own preferred time slice.
- Master thesis
- Other Research Projects
- RDMA-based Disaggregated Memory
- Improving QoS in Cache Memory Systems
- Hardware-assisted Security
- Hardware Accelerators
Awards & Scholarships
Awards & Scholarships
- Stars of Tomorrow (Award of Excellence), Microsoft Research Asia, Aug., 2018
- Excellent Teaching Assistant Award, KAIST, Mar. 2018
- KFAS Scholarship, the Korea Foundation for Advanced Studies, 2017-present
- National Scholarship, KAIST, 2016 - present
- National Scholarship, KAIST, 2014 - 2015
- Dean's List, College of Information & Communication Engineering, Sep. 2013
- Dean's List, College of Information & Communication Engineering, Mar. 2013
- Dean's List, College of Information & Communication Engineering, Sep. 2012
- Dean's List, College of Information & Communication Engineering, Mar. 2012
- National Scholarship for Science and Engineering, Korea Student Aid Foundation (KOSAF), 2010-2013
- Student Representative, Department of Computer Science, KAIST, Feb 2016 - Dec 2016
- Member of Graduate Student Dormitory Council, KAIST, Mar 2016 - Feb 2017
- Student, Korea Information Technology Research Institute, Jul. 2013 - Feb. 2014
- President, Computer Security Research Club, Sungkuynkwan University, Jul 2011 - Feb 2012
- Vice President, Computer Security Research Club, Sungkyunkwan University, Mar 2011 - Jun 2011
- Teaching Assistant for Computer Organization, KAIST, Fall 2017
- Teaching Assistant for System Programming, KAIST, Spring 2017
- Teaching Assistant for Introduction to Computer Application, KAIST, Fall 2015
- Teaching Assistant for Digital System and Lab, KAIST, Spring 2015
- Teaching Assistant for System Programming, KAIST, Fall 2014
- Teaching Assistant for Introduction to Programming (Python), KAIST, Spring 2014
- Programming Languages: C, C++, Python, Verilog, VHDL
- Software Frameworks
- Architecture Simulation: MarssX86, Gem5, NVMain, Pin
- Architecture Prototyping: Vivado, PetaLinux
- System Software: Linux, Xen
- Documentation Tools: Markdown, LaTeX
CV updated on 2018-08-19