Experience

NVIDIA

• Senior Deep Learning Engineer, NVIDIA, Nov. 2025 - Present

  • Cross-model KV cache transfer (NeurIPS 2026, first author): When a service switches a conversation between a small and a large model, the new model must reprocess the whole prompt (prefill). Showed that a model's KV cache, its working memory of the prompt, can be converted for a sibling model without training, using per-head closed-form ridge regression over the most predictive source layers in RoPE-free content space. Handoff is 2.7–25× faster while retaining up to 98% of accuracy. [paper]

  • Agentic performance optimization: Leading development of an agentic system that automates LLM-serving optimization.

• Senior HPC Middleware Developer, NVIDIA, Dec. 2023 - Oct. 2025

  • Cluster-scale AI benchmarking (CloudAI): Designed and built NVIDIA's benchmarking framework from scratch to GA in 11 months. Users describe the system, tests, and scenario once, and CloudAI runs the tests on Slurm, K8s, or RunAI, grades results against baselines, and generates reports. Workloads range from LLM training to disaggregated LLM serving, with agent-driven tuning. [code]

  • Trace-driven performance modeling (Chakra): Took it from research prototype to production use, simulating LLaMA training with under 2% error and replaying traces on real clusters for emulation. Used in customer engagements for system design exploration.

Georgia Institute of Technology

• Postdoctoral Fellow → Research Engineer II, Mar. 2023 - Dec. 2023 (with Tushar Krishna)

  • Standardized AI workload traces (Chakra, MLSys 2026): Led the design of a graph-based execution-trace schema capturing the compute, memory, and communication of distributed AI jobs and their dependencies, so simulators can reproduce real workloads without the original code or hardware. Now an MLCommons standard with contributors from NVIDIA, AMD, Meta, and HPE. [code]

  • Distributed training simulation (ASTRA-sim 2.0, ISPASS 2023, co-first author): Modeled large-model training on future clusters with hierarchical networks, disaggregated memory, and arbitrary parallelism. Taught tutorials at ASPLOS, ISCA, and MLSys. [project]

Meta

• Research Advisor IV (concurrent with Georgia Tech), Nov 2022 – Dec 2023

  • Developed Chakra jointly with Meta researchers and brought it into MLCommons as a cross-industry working group.

Microsoft Research Asia

• Visiting Fellow, Feb 2018 – Aug 2018

  • Built a Linux kernel mechanism for tiered DRAM–NVM memory that uses page-table accessed bits to pick the best page-migration policy for each workload, including huge pages. Achieved a 23.8% speedup over a prior approach (IEEE Trans. Computers).

Education

• Ph.D., Computer Science, KAIST, Mar 2016 – Feb 2022

  • Dissertation: Redesigning Hardware and Software Stacks for Terabyte-Scale Memory Systems (Advisor: Jaehyuk Huh)

• M.Sc., Computer Science, KAIST, Mar 2014 – Feb 2016

  • Thesis: Dynamic Time Slice Management Based on CPU Pooling in Virtualized Systems (Advisor: Jaehyuk Huh)

• B.Sc., Computer Engineering, Sungkyunkwan University, Mar 2010 – Feb 2014