Taekyung Heo

Ph.D. Student at KAIST

Research Group: Computer Architecture and Systems Lab

Advisor: Jaehyuk Huh

Contact Information

  • Email: taekyung.heo[a^t]kaist.ac.kr

  • Office: KAIST E3-1 Room #4413

CV.pdf

Research Interests

  • I am interested in designing hardware and software for terabyte-scale memory systems. Memory is a key component in computer systems. Emerging applications such as deep learning and recommendation systems require memory capacity that exceeds that of traditional memory systems. As a result, there is a need for redesigning hardware and software stacks. My Ph.D. studies identified problems and proposed solutions in data placement, memory allocation, security, and address translation.

Education

Publications

Internship

  • Research Intern, Microsoft Research Asia, Feb. 2018 - Aug. 2018

    • Mentor: Jinglei Ren & Lintao Zhang

    • Designed a data layout for a memory compression architecture with Jinglei.

    • Proposed an adaptive memory management policy for tiered memory systems in the Linux kernel with Lintao.
      (published in Transactions on Computers)

    • News article about interns' life at Microsoft Research Asia (link).

Research Experiences

  • Hardware-assisted Trusted Memory Disaggregation for Secure Far Memory

    • Designed and implemented a secure disaggregated memory system that supports fine-grained memory allocation on a Xilinx FPGA board.

    • Implemented the full HW & SW stacks, which include the FPGA and Linux kernel driver.

    • Participated as the first author leading the project.


  • A Sparse Matrix Multiplication Accelerator with Locality-aware Inner Product Processing

    • Identified the memory bloating problem in prior outer-product-based accelerators.

    • Proposed an inner-product-based sparse-matrix multiplication accelerator that exploits the locality in an inner product.

    • Participated as the third author to help motivational experiments and writing.

    • Published in PACT 2021.


  • Adaptive Page Migration Policy with Huge Pages in Tiered Memory Systems

    • As memory systems are adopting multiple tiers of memories with various costs and performance, page placement becomes critical to achieve high performance.

    • Analyzed the memory access patterns of workloads and proposed an adaptive page migration policy using the accessed bits in page table entries.

    • Participated as the first author leading the project.

    • Published in IEEE Transactions on Computers.


  • Accelerating Critical OS Services in Virtualized Systems with Flexible Micro-sliced Cores

    • In a virtualized environment, virtual CPUs (vCPUs) suffer from synchronization problems when a vCPU holding a lock sleeps after using up its timeslice.

    • Solved the synchronization problem in virtualized systems by introducing a CPU pool with a shorter time slice.

    • Participated as the third author to discuss the idea, implement the controller, and conduct motivational experiments.

    • Published in EuroSys 2018.


  • Improving TLB Translation Coverage under Diverse Fragmented Memory Allocations

    • While workloads have diverse memory allocation contiguity, prior studies in enhancing TLB translation capability lack adaptivity to various contiguity preferences.

    • Proposed a mechanism to encode page contiguity in page table entries to increase the TLB coverage.

    • Allowed an operating system to determine the number of contiguity-encoded page table entries to adapt to various contiguity preferences.

    • Participated as the second author to discuss the idea, implement the simulator, and conduct motivational experiments.

    • Published in ISCA 2017.


  • Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching

    • Having TLBs in the critical path of cache accesses hinders increasing the TLB size.

    • Solved the TLB scaling problem by proposing a virtual caching architecture backed with delayed segment address translation.

    • Participated as the second author to discuss the idea, implement the simulator, and conduct motivational experiments.

    • Published in ISCA 2016.

Awards & Scholarships

  • Stars of Tomorrow (Award of Excellence), Microsoft Research Asia, Aug., 2018

  • Excellent Teaching Assistant Award, KAIST, Mar. 2018

  • KFAS Scholarship, the Korea Foundation for Advanced Studies, 2017-2019

  • National Scholarship, KAIST, 2014 - present

  • Dean's List, College of Information & Communication Engineering, Mar. 2012, Sep. 2012, Mar. 2013, Sep. 2013

  • National Scholarship for Science and Engineering, Korea Student Aid Foundation (KOSAF), 2010-2013

Skills

  • Programming Languages: C, C++, Python

  • Architecture Simulators: Gem5, NVMain, Pin, MARSSx86

  • FPGA: Vivado, Vitis HLS, Verilog, Tcl

  • System Software: Linux Kernel

Extracurricular Activities

  • Student Representative, Department of Computer Science, KAIST, Feb 2016 - Dec 2016

  • Student, Korea Information Technology Research Institute, Jul. 2013 - Feb. 2014

  • President, Computer Security Research Club, Sungkuynkwan University, Jul 2011 - Feb 2012

  • Vice President, Computer Security Research Club, Sungkyunkwan University, Mar 2011 - Jun 2011

Teaching Experiences

  • Teaching Assistant for Computer Organization, KAIST, Fall 2017

  • Teaching Assistant for System Programming, KAIST, Spring 2017

  • Teaching Assistant for Introduction to Computer Application, KAIST, Fall 2015

  • Teaching Assistant for Digital System and Lab, KAIST, Spring 2015

  • Teaching Assistant for System Programming, KAIST, Fall 2014

  • Teaching Assistant for Introduction to Programming (Python), KAIST, Spring 2014

CV updated on 2021-10-03