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"Arise, awake and stop not till the goal is reached "- Swami Vivekananda
Educational background
School: Jawahar Navodaya Vidyalaya, Jalna (2010)
B.Tech: St. Vincent Pallotti College of Engineering and Technology, Nagpur (2014)
M.Tech.: National Institute of Technology, Goa (2017)
Ph.D.: Indian Institute of Technology Bombay (2025)
Teaching Assistantship
EE 792 - Communication Skills -II
EE 618 - CMOS Analog IC Design
EE 619 - RF Microelectronics Chip Design
EE 204 - Analog Circuits
EE 719 - Mixed-Signal VLSI Design
Academic Excellence
Gold medalist in M.Tech. VLSI (2015-17 batch), NIT Goa.
College second rank in C and Assembly language programming competition - 2014 organized by IETE Nagpur center.
Work Experience
Radio Frequency/Mixed Signal IC Design Intern (Feb 2019 - June 2019) at Maxlinear, Bangalore.
Research interest
High-performance sampled data circuits for communication applications
Hobby
Playing Harmonium and Synthesizer.
Publications
S. Khalapure, A. Kharalkar, R. Zele and S. Gupta, "Ringamp-Based Area-Efficient 500MSa/s Fully Differential Switched Capacitor Filters in 65nm CMOS," 2025 IEEE European Solid-State Electronics Research Conference (ESSERC), Munich, Germany, 2025, pp. 213-216, doi: 10.1109/ESSERC66193.2025.11213961.
S. Khalapure, N. Mittal, S. S. Samaga, S. S. Chekuri and R. Zele, "Logarithmic Successive Approximation Analog to Digital Converter for High Dynamic Range," 2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS), Punta del Este, Uruguay, 2024, pp. 1-5, doi: 10.1109/LASCAS60203.2024.10506118.
S. Jain, S. Khalapure and R. Zele, "Power Efficient Analog-Assisted Digital Voltage Regulator for Implantable Medical Devices," 2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS), Punta del Este, Uruguay, 2024, pp. 1-5, doi: 10.1109/LASCAS60203.2024.10506156.
S. Khalapure, S. Jain, A. C. Kulkarni, S. Vaidya, N. R. Lokurthi and R. Zele, "Machine Learning Techniques for Contactless Fast Body Temperature Imaging Portable Device," 2024 IEEE Applied Sensing Conference (APSCON), Goa, India, 2024, pp. 1-4, doi: 10.1109/APSCON60364.2024.10466059.
A. K. Tripathi, S. Khalapure and R. Zele, "8-bit 2-GS/s 20.5 mW Flash Assisted Time Interleaving SAR ADC for Direct Sampling RF Receivers," 2021 IEEE 18th India Council International Conference (INDICON), Guwahati, India, 2021, pp. 1-6, doi: 10.1109/INDICON52576.2021.9691533.
V. K. Kanchetla et al., "A Compact, Reconfigurable Receiver for IRNSS/GPS/Galileo/Beidou," 2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Atlanta, GA, USA, 2021, pp. 243-246, doi: 10.1109/RFIC51843.2021.9490498.
S. Khalapure, S. R.K., N. K. Y.B. and V. M.H., "Design of 5-Bit Flash ADC Using Multiple Input Standard Cell Gates for Large Input Swing," 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany, 2017, pp. 585-588, doi: 10.1109/ISVLSI.2017.108.
S. Jain, S. Khalapure and R. Zele, "Power Efficient Analog-Assisted Digital Voltage Regulator for Implantable Medical Devices," 2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS), Punta del Este, Uruguay, 2024, pp. 1-5, doi: 10.1109/LASCAS60203.2024.10506156.
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