The President of India, Shri Ram Nath Kovind inaugurated the Semiconductor Research Centre (SRC) under the Department of Electronics and Communication Engineering on 16th November 2021 in the presence of The Governor of Punjab, Shri Banwarilal Purohit, the Governor of Haryana - Shri. Bandaru Dattatreya and Advisor to the UT Administrator - Sh Dharam Pal, who were present as the Guests of Honor.
SRC has been established by Dr. Arun Kumar Singh, Professor, Dept. of Electronics and Communication Engineering, PEC Chandigarh. It is a state-of-the-art facility for the semiconducting material growth, micro-/nano-electronic device design, fabrication and their electrical (DC and RF) characterization. It comprises of 4 clean room laboratories having an area of 1300 sq. feet, of Class 1000 and 10000, dedicated for the chemical processing of semiconductors, material growth/deposition, lithography with a minimum feature size of 1.0 µm and electrical testing up to 20 GHz. The cleanroom facilities are supported by high end computing and simulation facility called Nano electronics Research Lab (NRL) at ECE Dept.
SRC has been established with the generous funding of about Rs. 5.00 Cr from the Department of Science and Technology Government of India under “Fund for Improvement of S&T Infrastructure (FIST)” and Science and Engineering Research Board (SERB) programme, Defence Research and Development Organisation (DRDO) and Punjab Engineering College (PEC).
The cleanroom facility of SRC is first of its kind facility in and around Chandigarh including Chandigarh Region Innovation and Knowledge Cluster (CRIKC) institutions. The cleanroom facility is the necessary requirement of nano and micro-devices fabrication, which makes it a usual choice for the researchers to successfully implement any nano-and micro-device designs. The SRC facilities are accessible to various researchers of PEC Chandigarh as well as researchers from other institutions including CRIKC institutions.
Applications are invited from the suitable candidates for the TWO (02) posts of Junior Research Fellow (JRF) to work on the Research project funded by Ministry of Electronics & Information Technology (MeitY), Govt. of India under Chips to Startup (C2S) Programme at Punjab Engineering College (Deemed to be University), Sector-12, Chandigarh.
Click here to see more details: https://pec.ac.in/jobs/job28-10-23 ( Last Date to Apply: 15.11.2023)
ATAL FDP on "From proof of concept to product design in Semiconductor Device Technology" During December 11-16, 2023 ( Last Date to Apply: December 01, 2023)
In0.53Ga0.47As-based self-switching diode bridge rectifier (SSDBR) is presented utilizing Silvaco TCAD computer simulations. A zero-bias self-switching diode exhibiting nonlinear current–voltage characteristics has been utilized for the device design. The output current, threshold voltage and maximum operating frequency of the device can be easily tuned by adjusting the channel width and length of the SSD, whereas the properties of conventional rectifiers are typically material-dependent. The AC and DC characteristics of the SSDBR are presented, demonstrating full wave rectification up to frequencies of 0.240 THz with a noise-equivalent power of 39.90 pW (Hz1/2)−1.
the thermoelectric properties of graphene-based three-terminal junction on SiO2/Si substrate. The device demonstrates rectified output voltage while applying electrical (AC/DC) signal or temperature gradient at the input terminals. The voltage detection sensitivity of 736.38 mV/mW and noise equivalent power of 26 pW/Hz1/2 is achieved at 15 V. At the temperature gradient of 150 K, the proposed device exhibits a thermal voltage of 0.83 mV at the output terminal. Accordingly, Seebeck coefficient of 82 and 123 μVK–1 is obtained at 300 and 450 K, respectively considering back-gate voltage of 0V.The results are further validated by the analytical model and are well in agreement with the simulation results obtained utilizing Silvaco TCAD software. The results suggest that the proposed G-TTJ can be realized for future energy harvesting applications in addition to microwave/THz detection.
Three self-powered photodetectors namely, p+-bilayer graphene (BLG)/n+-ZnO nanowires (NWs), p+-BLG/n+-Si NWs/p–-Si and p+-BLG/n+-ZnO NWs/p–-Si. The Silvaco Atlas TCAD software is utilized to characterize the optoelectronic properties of all the devices and is validated by analytical modeling. The proposed dual-junction photodetectors cover broadband spectral response varying from ultraviolet to near-infrared wavelengths. The dual-heterojunction broadband photodetector exhibits photocurrent switching with the rise and fall time of 1.48 and 1.27 ns, respectively. At −0.5 V bias, the highest external quantum efficiency, photocurrent responsivity, specific detectivity, and the lowest noise equivalent power of 71%, 0.28 A W−1, 4.2 × 1012 cmHz1/2 W−1, and 2.59 × 10–17 W, respectively, are found for the dual-heterojunction device with a wavelength of 480 nm at 300 K. The proposed nanowires based photodetectors offer great potential to be utilized as next-generation optoelectronic devices.
Different metamaterial absorbers (MMAs) namely, T, split-I (SI) and split- Jerusalem cross (SJC) with different dimensions and geometrical configurations. The absorption rates of T-, SI- and SJC shaped absorbers are studied at microwave frequencies. T-shaped absorber demonstrates perfect absorption at 10.19 GHz, making it suitable for single band operation, whereas SI-shaped absorber exhibits two perfect absorption peaks at 9.32 and 10.75 GHz finding its application in dual band operation. However, novel SJC-shaped absorber demonstrates multiple absorption peaks at 9.92, 10.42, 10.93, 11.75 and 13.25 GHz with absorption of 99.5, 91, 99.9, 91.8 and 99.6%, respectively, making it suitable for X- and Ku-band operations. The proposed MMAs have a thickness of around 0.8 mm (i.e. <λ/37) with respect to the lowest frequency of operation. Furthermore, the absorbers are analyzed for different angles of polarisation and incidence for transverse electric polarized wave with a step size of 15°. The proposed absorbers have been fabricated and experimentally demonstrated at X-band verifying the results obtained from simulations and implementing an equivalent circuit method. Further, SJC-shaped absorber is demonstrated for multi-and wide-band terahertz applications exhibiting four perfect absorption peaks at 2.76, 2.89, 3.02 and 3.31 THz.
Design and development of a Radio Frequency Micro-Electro-Mechanical-Systems (RF-MEMS) capacitive shunt switch based on a fixed-fixed beam configuration for X (8–12 GHz), Ku (12–18 GHz), K (18–26 GHz) and Ka (26–40 GHz) band applications. The design parameters for RF switch have been taken into consideration based on in-house standard 6” CMOS foundry. Silicon substrate with high resistivity (ρ > 8kΩ-cm, εr = 11.8, and tanδ = 0.01) has been utilized for the realization of MEMS switch. The device demonstrates the pull in voltage of 22.78 V. The measured return loss, insertion loss and isolation are better than 20 dB, 0.5 dB and 25 dB respectively, over the entire frequency band (0–40 GHz).The electromechanical and electromagnetic analyses of 3D structure were performed using Finite Element Method (FEM) & Method of Moments (MoM) based full wave simulators. Design and simulation data was further validated by measured results during DC and RF characterization of the devices.
RF and crosstalk analysis of Copper (Cu) and multi-layer Graphene nanoribbon (MLGNR) based interconnects using multi-gate (FinFET) and virtual-source carbon nanotube field effect transistor (CNFET) based repeater insertions in sub-10 nm regime. The SPICE based analysis utilizes an accurate π-type equivalent single conductor (ESC) model for mutually coupled interconnects at 7 nm technology node. The transfer function and 3-dB bandwidth results of lithium-doped MLGNRs offer many fold improved RF performance than Cu. The out-of-phase crosstalk induced (OPXT) delay results with FinFET repeaters demonstrate 27.54 and 67.6 % reductions for pristine and lithium-doped MLGNRs as compared to Cu, whereas CNFET repeaters demonstrate 20.48 and 81.88 % reductions at interconnect length of 1000 µm. The peak far-end crosstalk (FEXT) noise voltage results demonstrate 86.03 and 62.5 % using FinFET repeaters and 88.14 and 69.9 % reductions using CNFET repeaters for pristine and Li-doped MLGNRs than Cu at 1000 µm length.
An improved analytical model involving nanoscale material parameters for predicting threshold voltage of GaN HEMT is proposed. The proposed model for the first time incorporates the effect of structural miniaturization on nanoscale parameters such as bandgap, melting temperature, permittivity and polarization on the threshold voltage. The proposed model is derived, maintaining the charge neutrality across the device. Additionally, the effect of strain relaxation on threshold voltage due to higher Al mole concentration is included in the model. The surface barrier height is also evaluated as a considering both Al mole concentration and AlGaN barrier layer thickness. The developed model is verified for various topologies of HEMT exhibiting tunability and demonstrating excellent agreement between evaluated values and extracted values from the experimental data.