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Spectrum Next Portal

Utilities

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Firmware

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Technical Section


Registers

(R) 00 => Machine ID
(R) 01 => Version (Nibble most significant = Major, Nibble less significant = Minor)
(R/W) 02 => Reset:
  bits 7-3 = Reserved, must be 0
  bit 2 = (R) Power-on reset
  bit 1 = (R/W) if 1 Hard Reset
  bit 0 = (R/W) if 1 Soft Reset
(W) 03 => Set machine type, only in IPL or config mode:
  A write in this register disables the IPL (0x0000-0x3FFF are mapped to the RAM instead of the internal ROM)
  bits 7-5 = Reserved, must be 0
  bits 4-3 = Timing:
   00,
   01 = ZX 48K
   10 = ZX 128K
   11 = ZX +2/+3e
  bit 2 = Reserved, must be 0
  bits 1-0 = Machine type:
   00 = Config mode (bootrom)
   01 = ZX 48K
   10 = ZX 128K
   11 = ZX +2/+3e
(W) 04 => Set page RAM, only in config mode (no IPL):
  bits 7-5 = Reserved, must be 0
  bits 4-0 = RAM page mapped in 0x0000-0x3FFF (32 pages of 16K = 512K)
(R/W) 05 => Peripheral 1 setting:
  bits 7-6 = joystick 1 mode (00 = Sinclair, 01 = Kempston, 10 = Cursor)
  bits 5-4 = joystick 2 mode (same as joy1)
  bit 3 = Enable Enhaced ULA (1 = enabled)
  bit 2 = 50/60 Hz mode (0 = 50Hz, 1 = 60Hz)
  bit 1 = Enable Scanlines (1 = enabled)
  bit 0 = Enable Scandoubler (1 = enabled)
(R/W) 06 => Peripheral 2 setting:
  bit 7 = Enable turbo mode (0 = disabled, 1 = enabled)
  bit 6 = DAC chip mode (0 = I2S, 1 = JAP) (Only in VTrucco board)
  bit 5 = Enable Lightpen (1 = enabled)
  bit 4 = Enable DivMMC (1 = enabled)
  bit 3 = Enable Multiface (1 = enabled)
  bit 2 = PS/2 mode (0 = keyboard, 1 = mouse)
  bits 1-0 = Audio chip mode (0- = disabled, 10 = YM, 11 = AY)
(R/W) 07 => Turbo mode:
  bit 0 = Turbo (0 = 3.5MHz, 1 = 7MHz)
(R/W) 08 => Peripheral 3 setting:
  bits 7-4 = Reserved, must be 0
  bit 3 = Enable Specdrum/Covox (1 = enabled)
  bit 2 = Enable Timex modes (1 = enabled)
  bit 1 = Enable TurboSound (1 = enabled)
  bit 0 = NTSC/PAL for ZX-Uno (0 = NTSC)
{R/W) 10 => Anti-brick system (only in ZX Next Board):
  bit 7 = (W) If 1 start normal core
  bits 6-2 = Reserved, must be 0
  bit 1 = (R) Button DivMMC (1=pressed)
  bit 0 = (R) Button Multiface (1=pressed)
(R/W) 20 => Layer 2 transparency color
  bits 7-4 = Reserved, must be 0
  bits 3-0 = ULA transparency color (IGRB)
(R/W) 21 => Sprite system
  bits 7-2 = Reserved, must be 0
  bit 1 = Over border (1 = yes)
  bit 0 = Sprites visible (1 = visible)
(R/W) 22 => Layer2 Offset X
  bits 7-0 = X Offset (0-255)
(R/W) 23 => Layer2 Offset Y
  bist 7-6 = Reserved, must be 0
  bits 5-0 = Y Offset (0-63)
(R) 30 => Raster video line (MSB)
  bits 7-1 = Reserved, always 0
  bit 0 = Raster line MSB
(R) 31 = Raster video line (LSB)
  bits 7-0 = Raster line LSB (0-255)
(R/W) 34 => Raster line interrupt control
  bit 7 = (R) INT flag, 1=During INT (even if the processor has interrupt disabled)
  bits 6-3 = Reserved, must be 0
  bit 2 = If 1 disables original ULA interrupt
  bit 1 = If 1 enables Raster line interrupt
  bit 0 = MSB of Raster line interrupt value
(R/W) 35 => Raster line interrupt value LSB
  bits 7-0 = Raster line value LSB (0-255)
(W) FF => Debug LEDs (DE-1 and DE-2 only)

Hardware IDs

The Next/TBBlue can be “implemented” on various types of hardwares (boards), which are identified by an ID listed below:

1 = DE-1 (Altera development kit, old version)

2 = DE-2 (Altera development kit, new version)

5 = FBLabs

6 = VTrucco

7 = WXEDA

8 = Emulators

9 = ZXUNO

10 = ZX Spectrum Next (This is the one most people need!)

11 = Multicore


Memory Map

The Spectrum Next standard boards with 1024K SRAM are mapped as follows:

0x000000 – 0x03FFFF (256K) => DivMMC RAM

0x040000 – 0x05FFFF (128K) => Video RAM

0x060000 – 0x06FFFF (64K) => ESXDOS and Multiface RAM

0x060000 – 0x063FFF (16K) => ESXDOS ROM

0x064000 – 0x067FFF (16K) => Multiface ROM

0x068000 – 0x06BFFF (16K) => Multiface extra ROM

0x06c000 – 0x06FFFF (16K) => Multiface RAM

0x070000 – 0x07FFFF (64K) => ZX Spectrum ROM

0x080000 – 0x0FFFFF (512K) => ZX Spectrum RAM

TBBlue’s standard PCBs with 512K SRAM are mapped as follows:

(Next devkits prior to Issue 2, VTrucco, FBlabs, DE-1, DE-2, Multicore, WXEDA, ZX-Uno)

0x000000 – 0x01FFFF (128K) => DivMMC RAM

0x020000 – 0x03FFFF (128K) => Video RAM

0x040000 – 0x05FFFF (128K) => ZX Spectrum RAM

0x060000 – 0x06FFFF (64K) => ESXDOS and Multiface RAM

0x060000 – 0x063FFF (16K) => ESXDOS ROM

0x064000 – 0x067FFF (16K) => Multiface ROM

0x068000 – 0x06BFFF (16K) => Multiface extra ROM

0x06c000 – 0x06FFFF (16K) => Multiface RAM

0x070000 – 0x07FFFF (64K) => ZX Spectrum ROM


Turbo Sound

The internal Spectrum Next and TBBlue Turbo Sound Next interface implements three selectable PSGs, giving access to 9 sound channels plus 3 noise channels. Additionally we have the MOS IC 6581, the Sound Interface Device, aka ‘SID’.

The selection of the current sound IC is done by writing a value in the I/O port 0xFFFD, as below:

Bit 7 = “1”

Bit 6 = Left audio (“1” enabled, “0” disabled)

Bit 5 = Right audio (“1” enabled, “0” disabled)

Bit 4 = “1”

Bit 3 = “1”

Bit 2 = “1”

Bits 1 and 0 as

  • “’11”: Selects the first PSG (default);
  • “10”: Selects the second PSG;
  • “01”: Selects the third PSG.
  • “00”: Selects the SID.

For example, to select the second PSG, sound on both audio outs:

LD BC,0xFFFD

LD A, 0xFE ; 1111 1110 binary

OUT (C), A

To select SID on right audio only:

LD BC,0xFFFD

LD A, 0xBC ; 1011 1100 binary

OUT (C), A

Commands and data are sent to the standard I/O ports and will be redirected to the currently selected IC.

(to set a register)

LD BC, 0xFFFD

LD A, XX ; select the register: 0 to 15 for PSGs, 0 to 24 for SID

OUT (C), A

(to write to the selected register)

LD BC, 0xBFFD

LD A, XX ; the register value, 0 to 255

OUT (C),A

(to read a selected register)

LD BC, 0xBFFD

IN A,(C)


The config file

The Spectrum Next/TBBlue loads all the settings from an existing file on the SD card, allowing for more flexibility and user control. Using the SD card for configurations and ROMs greatly simplifies the life of the programmer who can quickly test a ROM without having to re-record a flash memory and risk having trouble starting the machine.

An example of the configuration file:

scandoubler=1
50_60hz=0
enhula=1
timex=0
psgmode=0
divmmc=1
mf=1
joystick1=0
joystick2=0
ps2=0
lightpen=0
scanlines=0
dac=0
turbo=0
default=3
menu=<title>,<type>,<romfile.ext>
...

These settings vary according to the hardware being used, but for the majority of users the default Next configuration is implemented (only TBBlue or devkits users need different settings). These are the default settings:

scandoubler can be 0 or 1 and it stores the scandoubler configuration, 1 being ‘on’.

50_60hz can be 0 or 1 and stores the vertical frequency setting, being 50Hz if the option is 0 and 60Hz if the option is 1.

enhula can be 0 or 1 and it stores the configuration of the advanced ULA, being activated if it is 1.

timex can be either 0 or 1 and it stores the setting if the Timex Sinclair video modes are active, 1 being to indicate this.

psgmode can be from 0 to 2 and it stores the implementation type of PSG, if 0 implements AY-8910, if 1 implements YM2149 and if it is 2 the PSG is disabled.

divmmc can be 0 or 1 and it stores the configuration of the interface DivMMC, if 1 the interface is active.

mf can be 0 or 1 and it stores the configuration of the interface Multiface, if 1 the interface is active.

joystick1 and joystick2 stores the settings of the two possible joystick ports (may vary depending on the hardware) and ranges from 0 to 2, 0 indicating Sinclair type, 1 indicating Kempston type, and 2 indicating Cursor type.

ps2 can be 0 or 1 and it stores the PS/2 port configuration, if 0 the port implements the keyboard and if 1 the port implements a mouse.

lightpen can be 0 or 1 and it stores the lightpen setting, being activated if 1.

scanlines can be 0 or 1 and it stores the setting of the scanlines generation, with 1 being indicated on.

dac stores the configuration of the DAC chip type, used only in VTrucco development hardware.

turbo stores the turbo configuration, if 0 the turbo mode is disabled completely.

After these settings comes the list of machine options, with the configuration of which list item is the default and will be loaded. The default option saves the index from the list below, and each menu-initiated line indicates an item in the list, with a limit of 10 machines maximum.

For each menu entry, there are 3 possible options separated by commas, the first option being the title of the machine that will be displayed to the user, the type of machine to implement and lastly the name of the file containing the ROM that will be loaded . The machine type can be 0 to 2, 0 indicates ZX Spectrum 48K, 1 indicates ZX Spectrum 128K and 2 indicates ZX Spectrum +2 and the ROM file size must match the machine type.


Sprites

The Spectrum Next/TBBlue have a new hardware sprites system, enabling easier programming of sprites and their manipulation on screen. The characteristics of the sprites are:


  • Total 64 sprites in 64 attribute slots and 64 pattern slots;
  • Size 16 by 16 pixels;
  • 256 colors per pixel;
  • 256-color palette where each sprite can define an offset from the palette;
  • Pink color reserved for transparent color;
  • Maximum of 12 sprites per scanline;
  • Collision detection of sprites;
  • Rotate and X/Y mirror flag;
  • Possibility to display sprites over the ZX Spectrum border.


The memory used for the sprites is separated from the main memory of the ZX Spectrum, being implemented in the internal memory of the FPGA and accessible via I/O ports.

Some options are configured via the TBBlue port system, reproduced here:

Port 0x243B is write-only and is used to set the registry number.

Port 0x253B is used to access the registry value.

Register:
(R/W) 21 => Sprite system
 bits 7-2 = Reserved, must be 0
 bit 1 = Over border (1 = yes)
 bit 0 = Sprites visible (1 = visible)

To turn on the sprites, bit 0 of register 21 must be set. If bit 1 is on, the sprites may be displayed over the default ZX Spectrum border.

Port 0x303B, if read, returns some information:

  • Bits 7-2: Reserved, always 0.
  • Bit 1: max sprites per line flag.
  • Bit 0: Collision flag.

Port 0x303B, if written, defines the sprite slot to be configured by ports 0x55 and 0x57, and also initializes the address of the palette.

Port 0x53 is write-only and is used to send the palette, the palette index is auto-incremented each write. The palette is initialized at the reset with colors from 0 to 255.

Port 0x55 is write-only and is used to send the pattern of the selected sprite slot, with the address being auto-incremented with each write and after sending the 256 bytes of the pattern the address points to the next sprite slot. Each pattern byte represents the offset of the palette and the order is left to right and top to bottom.

Port 0x57 is write-only and is used to send the attributes of the selected sprite slot, being the address is auto-incremented each writing and after sending the 4 bytes of attributes the address points to the next sprite. The description of each byte follows below:

  • 1st: X position (bits 7-0).
  • 2nd: Y position (0-255).
  • 3rd: bits 7-4 is palette offset, bit 3 is X mirror, bit 2 is Y mirror, bit 1 is rotate flag and bit 0 is X MSB.
  • 4th: bit 7 is visible flag, bit 6 is reserved, bits 5-0 is Name (pattern index, 0-63).

Addresses from Ports 0x55 and 0x57 are independent and configured together in the write port 0x303B however the increment of the address is done separately, can be sent the pattern of 10 sprites, for example, and then sent the attributes of the 10 sprites without having to rewrite in the port 0x303B.

Because sprites can be displayed on top of the ZX Spectrum border, the coordinates of each sprite can range from 0 to 319 for the X axis and 0 to 255 for the Y axis. For both axes, values from 0 to 31 are reserved for the Left or top border, for the X axis the values 288 to 319 is reserved for the right border and for the Y axis values 224 to 255 for the lower border.

If the display of the sprites on the border is disabled, the coordinates of the sprites range from (32,32) to (287,223).

The priority of the sprites is from 0 (least priority) to 63 (highest priority) and all sprites have a highest priority over all spectrum screens.

Each sprite has the Name attribute that defines which pattern it will display, and more than one sprite can display the same pattern. Each byte of the pattern defines the index of the palette with the 4 most significant bits being summed with bits 7-4 of the third byte of the atributes, allowing the programmer to display the same pattern with different colors.

As an example of the palette offset, if the byte of the pixel pattern (0,0) is 0x14, and the palette offset is 0x00, the color will be of the palette index 0x14, but if the palette offset is set to 0x20, The palette index will be 0x34.

In the palette each byte represents the colors in the RRRGGGBB format, and the pink color, defined by standard 11100011, is reserved for the transparent color.

Collisions of 2 or more sprites only happen if at least 2 non-transparent pixels are drawn in the same position on the screen.

As an example of a sprite, let’s check the pattern below: