Publications 

I. Jeong and J. -E. Park*, "X-PIM: Fast Modeling and Validation Framework for Mixed-Signal Processing-in-Memory Using Compressed Equivalent Model in SystemVerilog," 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), accepted as regular paper.

J. Oh, Y. Song, Y. -H. Hwang, J. -E. Park, M. Seok and D. -K. Jeong, "A Capacitorless External-Clock-Free Fully-Synthesizable Digital LDO with Time-Based Load-State Decision and Asynchronous Recovery," in IEEE Transactions on Power Electronics, Early Access.

J. Lee and J. -E. Park*, "Denoising Capacitive Touch Sensor Noise Network with U-Net Convolutional Neural Network," 2023 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), Busan, Korea, Republic of, 2023

I. Jeong and J. -E. Park*, "A Modeling and Simulation of ReRAM with Nonidealities for System-Level PIM Validation in System Verilog," 2023 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), Busan, Korea, Republic of, 2023, pp. 1-4

Y. Lee and J. -E. Park*, "A 43-fJ/Conv, 1-GS/s Energy-Efficient Charge-Steering Comparator with Floating-Inverter-Based Preamplifier in 40nm CMOS," 2023 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), Busan, Korea, Republic of, 2023, pp. 1-4

S. Kim, I. Jeong, and J.-E. Park*, “An N-Type Pseudo-Static eDRAM Macro with Reduced Access Time for High-Speed Processing-in-Memory in Intelligent Sensor Hub Applications,” Sensors, vol. 23, no. 23, p. 9329, Nov. 2023.

Y. -H. Hwang, J. Wang, D. -K. Jeong and J. -E. Park*, "An Area/Power-Efficient  ΔΣ  Modulator Based on Dynamic-Boost Inverter for Multichannel Sensor Applications," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 9, pp. 1403-1412, Sept. 2023.

J. Oh, Y. -H. Hwang, J. -E. Park, M. Seok and D. -K. Jeong, "An Output-Capacitor-Free Synthesizable Digital LDO Using CMP-Triggered Oscillator and Droop Detector," in IEEE Journal of Solid-State Circuits, vol. 58, no. 6, pp. 1769-1781, June 2023.

J. Oh, Y. Song, Y.-H. Hwang, J.-E. Park, M. Seok, D.-K. Jeong, "A 0.0043-mm2 Capacitorless External-Clock-Free Fully-Synthesizable Digital LDO Using Load-Direct Droop Detector and Time-Based Load-State Decision", in 2022 IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2022.

Y.-H. Hwang, Y. Song, J.-E. Park, D.-K. Jeong, "A Fully Passive Noise-Shaping SAR ADC Utilizing Last-Bit Majority Voting and Cyclic Dynamic Element Matching Techniques", in IEEE Transactions on Very Large Scale Integration (T-VLSI) Systems, Ocb. 2022.

Y.-H. Hwang, J. Oh, W.-S. Choi, D.-K. Jeong, and J. -E. Park*, "A Residue-Current-Locked Hybrid Low-Dropout Regulator Supporting Ultralow Dropout of Sub-50 mV with Fast Settling Time Below 10 ns," in IEEE Journal of Solid-State Circuits, Jul. 2022.

S. Kim, J.-E Park*, "Pseudo-Static Gain Cell of Embedded DRAM for Processing-in-Memory in Intelligent IoT Sensor Nodes," Sensors , 2022.

Y. Song, J. Oh, S. -Y. Cho, D. -K. Jeong and J. -E. Park*, "A Fast Droop-Recovery Event-Driven Digital LDO With Adaptive Linear/Binary Two-Step Search for Voltage Regulation in Advanced Memory," in IEEE Transactions on Power Electronics, Feb. 2022.

C. Chae, S. Kim, J. Choi and  J.-E. Park, "A Multi-Bit In-Memory-Computing SRAM Macro Using Column-Wise Charge Redistribution for DNN Inference in Edge Computing Devices," 2021 International SoC Design Conference (ISOCC), 2021.

J.-E. Park, J. Hwang, J. Oh, and D. Jeong, "A 0.4-to-1.2V 0.0057mm2 55fs-Transient-FoM Ring-Amplifier-Based Low-Dropout Regulator with Replica-Based PSR Enhancement," 2020 IEEE International Solid-State Circuits (ISSCC), 2020.

J. Oh, J.-E. Park, Y.-H. Hwang, and D. Jeong, "A 480mA Output-Capacitor-Free Synthesizable Digital LDO Using CMP-Triggered Oscillator and Droop Detector with 99.99% Current Efficiency, 1.3ns Response Time, and 9.8A/mm2 Current Density," 2020 IEEE International Solid-State Circuits (ISSCC), 2020.

J. Oh, J.-E. Park, and D. Jeong, "A Highly Synthesizable 0.5-to-1.0-V Digital Low-Dropout Regulator with Adaptive Clocking and Incremental Regulation Scheme," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 10, pp. 2174-2178, Oct. 2020 .

H. Kim, J.-E. Park and D. Jeong, "An Area-Efficient Temperature Compensated Sub-Threshold CMOS Voltage Reference," 2020 International SoC Design Conference (ISOCC), 2020.

J.-E. Park, J. Park, Y. Hwang, J. Oh and D. Jeong, "A Noise-Immunity-Enhanced Analog Front-End for 36x64 Touch-Screen Controllers With 20-VPP Noise Tolerance at 100 kHz," in IEEE Journal of Solid-State Circuits, vol. 54, no. 5, pp. 1497-1510, May 2019.

J.-E. Park, Y. Hwang and D. Jeong, "A 0.5-V Fully Synthesizable SAR ADC for On-Chip Distributed Waveform Monitors," in IEEE Access, vol. 7, pp. 63686-63697, May 2019.

J. Park, Y. Hwang, J. Oh, Y. Song, J.-E. Park and D. Jeong, "A Mutual Capacitance Touch Readout IC With 64% Reduced-Power Adiabatic Driving Over Heavily Coupled Touch Screen," in IEEE Journal of Solid-State Circuits, vol. 54, no. 6, pp. 1694-1704, Jun. 2019.

Y. Hwang, J. Oh, J. Park, Y. Song, J.-H. Park, J.-E. Park, and D. Jeong, "An Always-On 0.53-to-13.4 mW Power-Scalable Touchscreen Controller for Ultrathin Touchscreen Displays With Current-Mode Filter and Incremental Hybrid ΔΣ ADC," 2019 Proceedings of the ESSCIRC, 2019, pp. 313-316.

J. Park, Y. Hwang, J. Oh, Y. Song, J.-E. Park and D. Jeong, "A Compact Self-Capacitance Sensing Analog Front-End for a Touch Detection in Low-Power Mode," 2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2019, pp. 1-6.

J. Oh, J.-E. Park, and D. Jeong, "A 4.7uA Quiescent Current Synthesizable Digital Low Dropout Regulator in 28-nm CMOS," in 2019 International Conference on Electronics, Information, and Communication (ICEIC), Jan. 2019.

J.-E. Park and D. Jeong, "A Fully Integrated 700mA Event-Driven Digital Low-Dropout Regulator with Residue-Tracking Loop for Fine-Grained Power Management Unit," 2018 IEEE Symposium on VLSI Circuits, 2018, pp. 231-232.

J. Park, Y. Hwang, J. Oh, J.-E. Park and D. Jeong, "Adiabatically driven touch controller analog front-end for ultra-thin displays," 2018 IEEE Custom Integrated Circuits Conference (CICC), 2018, pp. 1-4.

Y. Hwang, Y. Song, J.-E. Park and D. Jeong, "A 0.6-to-1V 10k-to-100kHz BW 11.7b-ENOB Noise-Shaping SAR ADC for IoT sensor applications in 28-nm CMOS," 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2018, pp. 247-248.

J. Hwang, G.-S. Jeong, W. Bae, J.-E. Park, C.-S. Yoon, J.-M. Yoon, J. Joo, G. Kim, D. Jeong, "A 32 Gb/s, 201 mW, MZM/EAM cascode push–pull CML driver in 65 nm CMOS," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 4, pp. 436-440, Apr. 2018.

Y. Kim, G. Jeong, J.-E. Park, J. Park, G. Kim and D. Jeong, "20-Gb/s 5VPP and 25-Gb/s 3.8VPP Area-Efficient Modulator Drivers in 65-nm CMOS," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 11, pp. 1034-1038, Nov. 2018.

Y. Hwang, J.-E. Park, Y. Song and D. Jeong, "A 20 k-to-100kS/s Sub-μW 9.5b-ENOB Asynchronous SAR ADC for Energy-Harvesting Body Sensor Node SoCs in 0.18- μm CMOS," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 12, pp. 1814-1818, Dec. 2018.

J.-E. Park, Y. Hwang and D. Jeong, "A 0.4-to-1 V Voltage Scalable ΔΣ ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 12, pp. 1417-1421, Dec. 2017. 

Y. Hwang, J.-E. Park and D. Jeong, "A compact 87.1-dB DR bandwidth-scalable delta-sigma modulator based on dynamic gain-bandwidth-boosting inverter for audio applications," 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2017, pp. 293-296.

J.-E. Park, J. Park, Y. Hwang, J. Oh and D. Jeong, "A 100-TRX-channel configurable 85-to-385Hz-frame-rate analog front-end for touch controller with highly enhanced noise immunity of 20Vpp," 2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016, pp. 210-211. 

J.-E. Park, Y. Kim, S. Kim, G. Kim and D. Jeong, "20-Gb/s 3.6-VPP-swing source-series-terminated driver with 2-Tap FFE in 65-nm CMOS," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 2864-2867.

S. Kim, S. Jang, J.-E. Park, Y. Kim, G. Kim and D. Jeong, "A compact 22-Gb/s transmitter for optical links with all-digital phase-locked loop," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 2856-2859.

J. Joo, K. Jang, S. Kim, I. Kim, J. Oh, S. Kim, G. Jeong, Y. Kim, J.-E. Park, S. Kim, H. Chi, D. Jeong, and G. Kim, "Silicon photonic receiver and transmitter operating up to 36 Gb/s for λ~1550 nm," Opt. Express  23, 12232-12243, May 2015.

J.-E. Park, D. Lim and D. Jeong, "A Reconfigurable 40-to-67 dB SNR, 50-to-6400 Hz Frame-Rate, Column-Parallel Readout IC for Capacitive Touch-Screen Panels," in IEEE Journal of Solid-State Circuits, vol. 49, no. 10, pp. 2305-2318, Oct. 2014. 

J.-E. Park, D. Lim and D. Jeong, "A 6.3 mW high-SNR frame-rate scalable touch screen panel readout IC with column-parallel Σ-Δ ADC structure for mobile devices," 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2013, pp. 357-360. 

D.-H. Lim, S.-Y. Lim, W.-S Choi, J.-E. Park and D. Jeong, "A digital readout IC with digital offset canceller for capacitive sensors," in Journal of Semiconductor Technology and Science, vol. 12, no. 3, pp. 278-285, Sep. 2012.

D. Lim, J.-E. Park and D. Jeong, "A low-noise differential front-end and its controller for capacitive touch screen panels," 2012 Proceedings of the ESSCIRC, 2012, pp. 237-240.