Rajiv Nishtala

PhD, CS, UPC/BSC

I am Rajiv Nishtala, an associate staff software architect at Silicon labs, Oslo and a former PhD student at the Universitat Politècnica de Catalunya (UPC) and Barcelona Supercomputing Center (BSC).

Highlights:

  • Joined Silicon labs as a software architect (Nov. 2022)

  • Invited to teach "Introduction to machine learning" at Universitetet i Søraust-Noreg (Feb. 2022)

  • Invited Speaker at AIDArc-4 @ ISCA 2021 (Apr. 2021)

  • Our journal got accepted to JPDC (Feb 2021)

Research Overview:

A large part of my research focuses on how to harness the power of machine learning to optimise resource allocation for highly latency-sensitive cloud workloads while minimising power consumption.

My current focus is:

  • Energy efficiency

  • Resource management

  • Applied machine learning techniques.

Educational Overview

  • Doctor of Philosophy (PhD), Computer Architecture, 2013-2017

Technical University of Catalonia (UPC) , Barcelona, Spain

Thesis: Energy Optimising Methodologies On Heterogeneous Data Centres

Advisor: Prof. Xavier Martorell and Prof. Daniel Mossè

  • Master of Science (MSc.), Computer Science, 2011-2013

FH Heidelberg, Heidelberg, Germany

Thesis: Energy efficient Thread Co-Scheduling in Heterogeneous Multicore Systems

Advisor: Prof. Daniel Mossè and Prof. Barbara Sprick

  • Bachelor of Science (BSc.), Computer Science, 2007-2011

ICFAI University, Hyderabad, India

Work Overview:

  • Silicon labs, Oslo, Norway

Associate staff software architecture, 11/2022 - Present

  • Siemens Mobility AS, Oslo, Norway

Data Scientist 07/2022 - 10/2022

  • CoopX, Oslo, Norway

Data Scientist, 05/2020 - 06/2022

  • Norwegian University of Science and Technology, Trondheim, Norway

Research Scientist, 08/2018 - 05/2020

  • Barcelona Supercomputing Center, Barcelona, Spain

Postdoctoral Fellow, 08/2017 - 08/2018

Doctoral Fellow, 06/2013 - 08/2017

  • University of Pittsburgh, Pittsburgh, USA

Visiting Scholar, 10/2012 - 04/2013

  • Deutsches Krebsforschungszentrum, Heidelberg, Germany

Research Assistant, 06/2012 - 09/2012

  • Molcad GmbH, Darmstadt, Germany

Student Programmer, 02/2012 - 06/2012

Professional Services:

  • Reviewer for the MSc. project of Khakim Akhunov (Jan 6, 2020) "Way-predictive instruction cache access in Rocket Chip processor with RISC-V ISA".

  • Committee member for the MSc. thesis of Felippe Vieira Zacarias (August 30, 2018) “Intelligent Colocation of HPC Workloads for Enhancing Server Efficiency”.

  • DATE - 2019 (NOT PC/ERC)

  • IPDPS - 2019 (NOT PC/ERC)

  • Journal of Supercomputing 2019,2020 (Reviewer)

  • IEEE Computer Architecture Letters 2019, 2021 (Reviewer)

  • Invited Speaker at AIDArc-4 @ ISCA 2021 (Apr. 2021)

  • ACM TACO 2021 (Reviewer)