Ideal low-pass filters should have a steep transition band and excellent gain flatness in the pass band as shown by the brick wall dashed line in Figure 2. Furthermore, the stop band attenuation should reduce any residual out-of-band signal to zero. The response of some commonly used practical filters are shown in the colored lines in Figure 2. If the pass band gain is not flat or exhibits ripples, this response may scale the fundamental signal. The attenuation of the stop band is not infinite, which limits screening the noise out of band. There can also be a transition band without steep falloff, which degrades noise attenuation around the cutoff frequency. In addition, all non-ideal filters introduce a phase delay or group delay.
The analog low-pass filter can remove high frequency noise and interference from the signal path prior to the ADC conversion to help avoid contaminating the signal with aliased noise. It also eliminates the effects of overdriven signals beyond the bandwidth of the filter to avoid modulator saturation. In case of input overvoltage, the analog filter also limits the input current and attenuates the input voltage. Thus, it can protect the ADC's input circuitry. Noise peaks riding on signals near full scale have the potential to saturate the analog modulator of ADCs. They have to be attenuated with analog filters.
Since the digital filtering occurs after the conversion, it can remove noise injected during the conversion process. In real applications, the sampling rate is much higher than twice the fundamental signal frequency indicated by the Nyquist theorem. So, a postdigital filter could be utilized to reduce noise (such as input noise outside of signal bandwidth, power supply noise, reference noise, noise feed through digital interface, ADC chip thermal noise, or quantization noise) injected during the conversion process by using filtering techniques for a higher signal-to-noise ratio with even higher resolution.
Antialiasing filters are placed in front of ADCs, so these filters consequently are required to be analog filters. An ideal antialiasing filter features unity gain in the pass band with no gain variation and a level of alias attenuation that matches the theoretical dynamic range of the data conversion system in use.
The designer should ascertain that the RC filter in front of the ADC can fully settle within the target acquisition time. This is especially important for precision ADCs requiring a larger input current or having the equivalent smaller input impedance. Some Î-Î ADCs have maximum input RC value requirements in an unbuffered input mode. Extra narrow low-pass filters with larger resistors or caps that can be added in front of the input amplifier that generally has a large input impedance. Alternatively, ADCs with very high input impedances can be selected, such as ADAS3022 with its 500 MÎ input impedance.
One single filter after the mux can be used for the channels, which makes the design simpler and the cost lower. As discussed above, analog filters invariably introduce settling time. Every time the mux switches between channels, this single filter has to be recharged to the value of the selected channel, thus limiting the throughput rate. For a faster throughput rate, one filter for each channel in front of the mux can be an option, but this entails a higher cost.
Applications encountering high noise levels, especially those with high levels of interference occurring close to the edge of the first Nyquist zone, require filters with aggressive roll off. However, as it is known for practical analog low-pass filters, the amplitude rolls down from low frequency to high frequency and has a transition band. More filter stages, or orders, may help improve flatness on in-band signals and render a narrower transition band. However, the design of these filters is complex because they are too sensitive to gain matching to be practical at a few orders of attenuation magnitude. Additionally, any component, such as a resistor or an amplifier, added in the signal chain will introduce in-band noise.
There is a trade-off in analog filter design complexity and performance for some specific applications. For example, in power line relay protection with an AD7606, the protection channels have lower accuracy requirements for the fundamental 50 Hz/60 Hz input signal and its associated first five harmonics, than the measurement channels. One first-order RC filter could be used for the protection channels, while a second-order RC filter provides better in-band flatness and more aggressive falloff transition for the measurement channels.
Filter design is not just about frequency design; users may also need to consider time domain characteristics and phase response of the analog filters. Phase delay may be critical in some real-time applications. Phase alteration becomes even worse if phase varies according to input frequency. The phase variation in a filter is normally measured in terms of group delay. For a nonconstant group delay, a signal spreads out in time, causing a poor impulse response.
With the previous design concerns in mind, the active analog filters can be designed using ADI's Analog Filter Wizard. It will calculate capacitor and resistor values, as well as select amplifiers required for the application.
SAR and Î-Î ADCs have been steadily achieving higher sample rates and input bandwidths. Oversampling a signal at twice the Nyquist rate evenly spreads the ADC's quantization noise power into a double frequency band. Then it is easy to design digital filters to band-limit the digitized signal, and then decimate to the desired final sample rate. This technique reduces the in-band quantization error and improves ADC SNR. This technique reduces the pressure on the antialiasing filter by relaxing filter roll-off. Oversampling techniques reduce the demands on the filters, but requires higher sample rate ADCs and faster digital processing.
Usually, digital filters reside in an FPGA, DSP, or processor. To reduce the system design effort, ADI provides some precision ADCs with integrated post digital filters. For example, the AD7606 has a one-order post digital sinc filter for oversampling. It is easily configured by pulling up or down the OS pins. The Î-Î ADC AD7175-x not only has a traditional sinc3 filter, but also sinc5 + sinc1 and enhanced 50 Hz and 60 Hz rejection filters. The AD7124-x provides a fast settling mode (sinc4 + sinc1 or sinc3 + sinc1 filter) function.
Digital filters have the disadvantage of latency, which depends on the digital filters' orders and master clock rate. The latency should be limited for real-time applications and loop response time. The output data rate in the data sheet is the rate at which valid conversions are available when continuous conversions are performed on a single channel. When the user switches to another channel, additional time is required for the Î-Î modulator and digital filter to settle. The settling time associated with these converters is the time it takes the output data to reflect the input voltage following a channel change. To accurately reflect the analog input following a channel change, the digital filter must be flushed of all data pertaining to the previous analog input.
Some new ADI Î-Î ADCs, such as the AD7175-x, contain optimized digital filters to decrease the settling time when channel switching. The AD7175-x's sinc5 + sinc1 filter is targeted at multiplexed applications and achieves single cycle settling at output data rates of 10 kSPS and lower.
As discussed in many articles, the higher the oversampling frequency, the easier the analog filter design becomes. When sampling at a higher rate than you need to satisfy Nyquist, a simpler analog filter could be used to avoid any exposure to aliasing from extremely high frequencies. It is difficult to design an analog filter to attenuate a desired frequency band without distortion, but easy to design an analog filter to reject high frequencies with oversampling. Then it is easy to design digital filters to band-limit the conversion signal, and then decimate to the desired final sample rate without losing desired information.
The challenges and considerations discussed in this article can help the designer implement practical filters to help achieve the objectives of a precision acquisition system. Analog filters have to interface to the nonideal input structures of SAR or Î-Î ADCs without violating system error budgets while digital filter should not cause errors on the processor side. It is not an easy task, and trade offs must be made in system specifications, response time, cost, design effort, and resources.
The functions fir1, fir2, firls, firpm, fircls,and fircls1 all design typeI and II linear phase FIR filters by default. rcosdesign designsonly type I filters. Both firls and firpm designtype III and IV linear phase FIR filters given a 'hilbert' or 'differentiator' flag. cfirpm can design any type of linearphase filter, and nonlinear phase filters as well.
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