Pcb Trace Width Calculator

1a. ANSWER: The original graphs that this tool is based on (published in IPC-D-275) only cover up to 35 Amps, up to 0.4 inches of trace width, from 10 to 100 degrees C of temperature rise, and copper of 0.5 to 3 ounces per square foot. The formulas used here will simply extrapolate when the values are outside of these ranges.

1b. QUESTION: I used your PCB trace width calculator. Intuitively I would say the required internal trace width would be less than the external case since the external trace can peal off; the opposite is true according to the calculator???? Why?

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1b. ANSWER: In air, the external layers have better heat transfer due to convection. A good heat insulator blankets the internal layers, so they get hotter for a given width and current. Since the Trace Width Calculator tries to control the temperature rise of the traces, it makes the internal traces wider. In vacuum, or in a potted assembly, you should use the internal layer guidelines even for the external layers.

1c. ANSWER: Temperature rise means how much hotter the trace will get with current flowing in it compared to without. You have to decide how much temperature rise your board can handle based on the operating environment and the type of PWB material used. Ten degrees is a very safe number to use for just about any application. If you can live with the trace width required for a ten-degree rise, you are good to go. If you want to try to skinny up the traces, ask for 20 degrees of temperature or more.

How should I work in pulsed current into your formula. An example would be a 10uS pulsed 45 Amps then a delay of 7 seconds. Also, it would be helpful if you added entering your present design trace i.e. weight, width, lenght, current, duty cycle or pulse width, with an output from the calculator to include IR drop and temperature rise.

IPC-D-275 is a standard for printed circuit board design that has guidelines for trace width verses current. IPC-D-275 has been replaced by IPC-2221 and IPC-2222, but the guidelines regarding current carrying capacity have not changed and are now in IPC-2221.

I presume the calculator is based on a stead-state current supplied through the trace. If the current is not in a steady state as in a current spike situation that only occur in micro-seconds, how does the calculator take that into account?

If I wanted to calcualte a width/weight of a copper external track I wanted to use as a fuse, does anyone have experience of how I could use this calculator to come up with a usable answer, maybe like specifying a high temperature rise?

Hi,

I am designing a power board to control a motor from an actuator, FLA (Full Load Amps) = 12 Amps and LRA (Locked Rotor Amps) = 62 Amps. What is the rule in this case for the width and thickness of the trace? For start-up currents and a trace that is design to carry 12 amps, what would be the max current that this trace will handle to start that motor?

A copper sheet of 1 oz/ft^2 has a thickness of 0.035 mm or 1.4 mils. Another handy thing to memorize is that 1 oz/ft^2 copper has a resistivity of 0.5 milliohms per square. It applies to a square of any size, so you can visually break a trace into squares and then quickly estimate resistance. Okay, so if we have a trace that is made of 0.5 oz/ft^2 copper and is 7 inches long and 0.5 inches wide, what is the resistance a.) using the head calculation method, and b.) using the trace calculator link above?

The coefficients are slightly different, how did you obtain your

equation? You did a curve-fitting directly from fig 6.4?

Do you plan to update this calculator with the new standard IPC-2152?

My coefficients were slightly different because I did my own curve fit before the coefficients were published as part of IPC-2221A. Prior specs only published graphs, not equations. Since you pointed out the difference, I went ahead and updated my calculator to match IPC-2221A. I plan to keep the calculator updated to new the specs when they become available.

That is a good idea. I found some references on fusing current here:

However, it seems that the various formulas give widely different results and were not correlated to any test data are therefore extremely approximate. Does anyone know of a better study that has been tested? Is anyone interested in doing such a study? If we can find a formula that can be trusted, I will add it to the calculators.

The IPC-2221 standard is based on some observed temperature rise data on some specific PCB test articles. The observed data was then converted into a empirical formulas. Your observations point out that the empirical relationship between width and current is not linear, however the relationship between thickness and current is linear. It seems likely that the IPC standard has assumed some spreading between traces which would allow paralleled traces to be able to carry more current at the same temperature rise than a single trace of the equivalent total width.

As far as the thickness to current relationship, it is linear because the required trace area is calculated then divided by thickness to get width. So while the area is based on a non-linear formula, the thickness has a basic linear scaling effect. Douglas Brooks [1] has done some studies where thickness and width were included as separate non-linear effects in the empirical equation. He was able to get slightly better curve fitting to the data.

There has forever been a push to find a better way to calculate the width-current-temperature relationship in PCBs, but this has been elusive. A recent good effort in progress is called IPC-2152 [2]. PCB thermal calculations can be done very accurately using finite element analysis software if the entire PCB board geometry, and layer stack-up, and surrounding thermal environment are modeled in complete detail, however this is usually too expensive and time consuming. Some projects demand that level of detail, however the present IPC-2221 standard gives us a simple time honored approach that is generally considered to be conservative.

Brad,

Thanks for the additional information.

I also realized that when stacking narrower traces, the temperature rises need to be combined. So for example, with 5 traces stacked, the outer 2 may be at 70C ambient, but a rise in the trace temp (e.g. 10C) would leave the inner 3 at an ambient of near 80C.

You got it. You should not let the traces exceed the Relative Thermal Index (RTI) of the PCB material. Relative Thermal Index (RTI) as defined by Underwriters Laboratories UL 746B is the temperature at which 50% of material properties are retained after a conditioning period of 100,000 hours.

Sharp corners on copper fills and traces can be an issue with high voltage. The electric field is much higher at sharp corners which may lead to arcing. For air at Standard Temperature and Pressure (STP), the minimum arc-over voltage is around 380 volts [1]. Higher altitudes and different gases can lead to arc-over at lower voltages [2]. However, for low voltage circuits, this is not generally a concern.

90 degree corners have historically concerned some people with regard to causing an impedance discontinuity in the trace or an EMI issue. Douglas Brooks has done an analysis of this and shown it to be a fairly insignificant effect [3]. Update Apr-6-2007: I have added [4].

Hi Vinoth,

Do you mean using the copper traces, or to embed physical components inside the board? If copper traces, you may be able to use -resistance-calculator

For physically embedding, I do not know, but does anyone else have a suggestion?

Brad

I have a nagging question about the trace width calculator for internal traces. Intuitively I would think that for a fixed temp. rise, say 10 deg. C, that the trace width requirement would change depending on how long the trace is. If the trace is very short the internal dissipation would be very small and the board material would act like a sink for small values. As the trace length is increased the trace dissipates more energy and at some point one would think the trace width would need to be increased to maintain the 10 deg. C rise. Where is my thinking going wrong?

The length parameter in this calculator is only used to calculate the resistance, voltage drop, and power dissipation, but does not enter into the IPC-2221 temperature rise calculation. The Flomerics report referenced in [1] finds that the formula in IPC-2221 correlates to a 46 inch board with a 6 inch trace running across the middle of the board.

I am currently working on detailed thermal modeling and finding better ways of determining trace width, but for many years the method of IPC-2221 has been used with success because it gives pretty conservative results.

To decrease the impedance of a trace, you can either decrease its width, or increase the spacing between the trace and the ground plane(s). In addition, you may use a PCB material with a lower relative permittivity of the dielectric, but that may not be practical. Routing the trace on an outer layer (as a microstrip) rather than as an internal trace (as a stripline) may be another option. See the PCB Trace Impedance Calculator here: You may also want to run some calculations to see if the resistance is really a problem using the PCB Trace Resistance Calculator

A number of months ago I used your calculator in reverse to determine the current carrying capability of traces on my PCB. At that time an internal trace width of 200mils (2oz copper, 10C temperature rise, 20C ambient temperature) resulted in a current carrying capability of 5.435A. When I plug in these same parameters today the result is an internal trace width of 200mils has a current capability of 6.42A. Because of this discrepancy I checked the IPC-2221A curves. When using the same parameters with the IPC-2221A curves I get an internal trace width of 200mils has a current capability of ~5.9A. Am I doing something wrong or has the calculator been changed? I apologize if this was discussed in a previous posting. Thank you for the help. 17dc91bb1f