TUTORIAL
Create your own OpenFPGA!
International Conference on Field Programmable Technology (FPT), 2022
Conference Dates: 5-9 December, 2022
What is OpenFPGA?
What is OpenFPGA?
OpenFPGA is an open-source framework that automates and accelerates the development cycle of customizable FPGA architectures. OpenFPGA allows users to define customized FPGA architectures using a high-level architecture description language and autogenerate the corresponding Verilog netlists that can be used in a backend flow to generate production-ready layouts.
OpenFPGA is an open-source framework that automates and accelerates the development cycle of customizable FPGA architectures. OpenFPGA allows users to define customized FPGA architectures using a high-level architecture description language and autogenerate the corresponding Verilog netlists that can be used in a backend flow to generate production-ready layouts.
About the workshop
About the workshop
This workshop will introduce the participants to
This workshop will introduce the participants to
It will showcase its capabilities and features through live demos. It will also provide them with hands-on training on how to use the OpenFPGA framework. It is targeted toward FPGA enthusiasts and researchers who are interested in exploring novel FPGA architectures and/or fabricating their own custom FPGAs.
It will showcase its capabilities and features through live demos. It will also provide them with hands-on training on how to use the OpenFPGA framework. It is targeted toward FPGA enthusiasts and researchers who are interested in exploring novel FPGA architectures and/or fabricating their own custom FPGAs.
What will the participants learn ?
What will the participants learn ?
• FPGA architects will learn how to efficiently implement FPGAs and generate layouts so that their architecture innovation can be quickly validated
• FPGA architects will learn how to efficiently implement FPGAs and generate layouts so that their architecture innovation can be quickly validated
• FPGA toolchain developers will learn how to get Quality-of-Results (QoR) on realistic and novel FPGA fabrics
• FPGA toolchain developers will learn how to get Quality-of-Results (QoR) on realistic and novel FPGA fabrics
• FPGA circuit designers will learn how to quickly integrate novel circuit components into FPGA fabrics and evaluate power, performance, and area
• FPGA circuit designers will learn how to quickly integrate novel circuit components into FPGA fabrics and evaluate power, performance, and area
• FPGA verification engineers will learn how to generate test benches that can be readily used for verification of the FPGA fabric
• FPGA verification engineers will learn how to generate test benches that can be readily used for verification of the FPGA fabric
• FPGA programmers will learn how to generate bitstreams for their Verilog designs and analyze timing and area results
• FPGA programmers will learn how to generate bitstreams for their Verilog designs and analyze timing and area results
At the end of the workshop, the participants will be able to:
At the end of the workshop, the participants will be able to:
• Define a custom FPGA architecture using an XML-based architecture description language
• Define a custom FPGA architecture using an XML-based architecture description language
• Generate netlists and layouts for these custom FPGAs using the OpenFPGA tool flow
• Generate netlists and layouts for these custom FPGAs using the OpenFPGA tool flow
• Generate bitstreams for Verilog designs that can be configured for the custom FPGAs
• Generate bitstreams for Verilog designs that can be configured for the custom FPGAs
Pre-requistes: Basic knowledge of digital design and FPGAs
Pre-requistes: Basic knowledge of digital design and FPGAs
PRESENTERS
PRESENTERS
Vaughn Betz
Vaughn Betz
Professor and NSERC/Intel Industrial Research Chair at University of Toronto, Canada
Pierre-Emmanuel Gaillardon
Pierre-Emmanuel Gaillardon
Associate Professor, University of Utah and CTO, RapidSilicon
Associate Professor, University of Utah and CTO, RapidSilicon
Nanditha Rao
Nanditha Rao
Assistant Professor at International Institute of Information Technology, Bangalore, India
Aman Arora
Aman Arora
PhD candidate at University of Texas, Austin
PhD candidate at University of Texas, Austin
Tarachand Pagarani
Tarachand Pagarani
Country Manager at QuickLogic Corporation
Grant Brown
Grant Brown
Doctoral Student at University of Utah
CONFERENCE DETAILS
CONFERENCE DETAILS
Dates:
Dates:
Conference Link:
Conference Link:
Contact Us
Contact Us
You can email us at:
You can email us at:
Nanditha Rao: nanditha.rao@iiitb.ac.in
Aman Arora: aman.kbm@utexas.edu
