Abstract: The processing requirements of real-time vision on mobile platforms call for highly parallel processor architectures and careful balancing of performance and power consumption. Data-transfers (processor-memory, sensor-processor interface, etc.) are the bottleneck in terms of achievable performance and the power dissipation of the system. A solution to this problem is to move the processing right next to the data locations (sensors and memory), in a tightly coupled fine grain massively parallel system. In this talk I will overview processor developments at the University of Manchester based on this idea. In particular, I will present the latest vision chips developed at The University of Manchester (SCAMP 5 and SCAMP-7), which integrate 65,536 processor cores (ALUs + local memory) embedded in a 256x256 imager array. The silicon area constraints imposed by such high level of integration call for unconventional circuit solutions, and the SCAMP technology uses a mixed-signal analogue/digital datapath, with arithmetic operations carried out in the analogue domain. The efficient analogue computing is achieved without compromising the flexibility, as the device implements software-programmable SIMD architecture, with a programming framework based on C++ and assembly language instructions. We will overview the system architecture, and present example algorithms and applications of these devices, illustrating their unique capability for high-speed operation in a low-cost, low-power system.