Analog Power Integrated Circuits (Linear)
Analog Power Integrated Circuits (Linear)
Course contents:
1. Course introduction (PDF)
2. MOSFET: Device structure and Vth (PDF)
3. MOSFET: (I-V) characteristics (PDF)
4. MOSFET: Channel length modulation effect (PDF)
5. MOSFET: Body effect and small signal model (PDF)
6. MOSFET: Capacitance and parameters (PDF)
7. MOSFET: Sub-threshold conduction (PDF)
8. Diode connected MOSFET and Process variations (PDF)
9. Simple current mirror (PDF)
10. Cascode current mirror (PDF)
11. Double cascode & High swing cascode current mirror (PDF)
12. Sooch cascode current mirror (PDF)
13. Beta-multiplier current reference (PDF)
14. Supply sensitivity and biasing example (PDF)
15. Constant-gm biasing and Iref generator (PDF)
Assessment exam-1 (Question)(Solution)
16. Circuit simulation using LT-Spice (PDF) (Simulation files)
17. Voltage reference performance parameters (PDF)
18. Voltage mode BandGap reference circuits (PDF)
19. Current mode BandGap reference circuits (PDF)
20. Process trimming and Second order compensation (PDF)
21. Subthreshold region based MOSFET only references (PDF)
22. MOSFET only references: Case studies (PDF)
Simulation project suggestions, Ibias and Vref circuits (PDF)
23. Negative feedback and stability conditions (PDF)
24. MATLAB simulations: Negative feedback and stability (PDF)
25. PLL system introduction (PDF)
26. PLL phase locked condition and error signals (PDF)
27. PLL phase frequency detector (PFD) (PDF)
28. PLL small signal model (PDF)
29. PLL Type-I, 2nd order loop analysis (PDF)
30. PLL Type-II, 2nd order loop analysis (PDF)
31. PLL Type-II, 3rd order loop analysis (PDF)
32. PLL transient waveforms, PFD deadzone (PDF)
33. PLL charge-pump circuits (PDF)
Practice problems (Question)
34. Oscillators: Feedback view
35. Oscillators: Negative resistance view
Reference textbooks:
1. "Design of Analog CMOS Integrated Circuits", Behzad Razavi (2nd edition)
2. "Analysis and Design of Analog Integrated Circuits", Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer (5th edition)
3. "Design of Power Management Integrated Circuits", Bernhard Wicht, Wiley-IEEE Press, 2024.
4. "Power Management Techniques for Integrated Circuit Design", Ke-Horng Chen, Wiley-IEEE Press, 2016.
5. Selected papers from IEEExplore
Voltage reference circuits:
1. C. Huang, C. Zhan, L. He, L. Wang and Y. Nan, "A 0.6-V Minimum-Supply, 23.5 ppm/°C Subthreshold CMOS Voltage Reference With 0.45% Variation Coefficient," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 10, pp. 1290-1294, Oct. 2018.
2. L. Wang and C. Zhan, "A 0.7-V 28-nW CMOS Subthreshold Voltage and Current Reference in One Simple Circuit," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 9, pp. 3457-3466, Sept. 2019.
3. J. Duan, Z. Zhu, J. Deng, W. Xu and B. Wei, "A Novel 0.8-V 79-nW CMOS-Only Voltage Reference With −55-dB PSRR @ 100 Hz," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 7, pp. 849-853, July 2018.
4. H. Zhuang, Z. Zhu and Y. Yang, "A 19-nW 0.7-V CMOS Voltage Reference With No Amplifiers and No Clock Circuits," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 61, no. 11, pp. 830-834, Nov. 2014.
5. A. Parisi, A. Finocchiaro, G. Papotto and G. Palmisano, "Nano-Power CMOS Voltage Reference for RF-Powered Systems," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 10, pp. 1425-1429, Oct. 2018.
6. X. Liao, X. Liu, Y. Wang and L. Liu, "A High-Precision Current-Mode Bandgap Reference With Low-Frequency Noise/Offset Elimination," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 11, pp. 3993-3997, Nov. 2023.
7. Z. Zhang, C. Zhan, L. Wang and M. -K. Law, "A −40°C to 125°C 0.4μA Low-Noise Bandgap Voltage Reference With 0.8mA Load Driving Capability Using Shared Feedback Resistors," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 10, pp. 4033-4037, Oct. 2022.
8. J. Wang, X. Sun and L. Cheng, "A Picowatt CMOS Voltage Reference Operating at 0.5V Power Supply With Process and Temperature Compensation for Low-Power IoT Systems," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 4, pp. 1336-1340, April 2023.
9. C. F. Lee, C. W. U, R. P. Martins and C. S. Lam, "A 0.5V 22.5ppm/°C Bandgap Voltage Reference With Leakage Current Injection for Curvature Correction," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 10, pp. 3897-3901, Oct. 2023.
10. M. Lefebvre, D. Flandre and D. Bol, "A 1.1/0.9nA Temperature-Independent 213/565 ppm/°C Self-Biased CMOS-Only Current Reference in 65nm Bulk and 22nm FDSOI," in IEEE Journal of Solid-State Circuits, vol. 58, no. 8, pp. 2239-2251, Aug. 2023.
11. D. Shetty, C. Steffan, G. Holweg, W. Bosch and J. Grosinger, "Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 3, pp. 1030-1042, March 2023.
12. C. Che, K. M. Lei, R. P. Martins and P. I. Mak, "A 0.4V 8400-μm2 Voltage Reference in 65-nm CMOS Exploiting Well-Proximity Effect," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 10, pp. 3822-3826, Oct. 2023.