건국대학교 회로 및 시스템 설계 연구실 홈페이지 방문을 환영합니다!
Our research is focused on design of analog and mixed-signal CMOS integrated circuits, data converters (analog-to-digital converter, digital-to-analog converter), and other interface circuits.
Their applications include:
High-speed data interface circuit for wireline
Mobile wireless transceiver for LTE, 5G and beyond 5G
Ultra-low power IoT sensor for smart devices and smart cities
Artificial Intelligence (AI) system based on mixed-signal processing
2022/11 Our paper titled "A 10-Gbps, 0.121-pJ/bit, All-Digital True Random-Number Generator Using Middle Square
Method" was accepted to IEEE Asian Solid-State Circuits Conference. Congratulations Jonghyun Kim!
2022/11 Our paper titled "A 7-Bit 4-GS/s Quad-Channel Time-Interleaved SAR ADC With 2-Then-1-Bit/Cycle Conversion"
was accepted to IEEE Asian Solid-State Circuits Conference. Congratulations Jihyun Baek!
2022/09 Our paper titled "2nd-Order Pipelined Noise-Shaping SAR ADC Using Error-Feedback Structure" was accepted to
Electronics. Congratulations Jihyun Baek!
2022/04 CSDL is funded by PIM Research Center from Ministry of Science and ICT for 4 years
2021/10 Our paper titled "Conception and Simulation of a 2-Then-1-Bit/Cycle Noise-Shaping SAR ADC" was accepted to
Electronics. Congratulations Kihyun Kim!
2021/08 Our paper titled "Readout Integrated Circuit for Low Size and low Power Gas Sensor based on HEMT Device"
was accepted to Sensors. Congratulations Seungjun Lee!
2021/08 Our paper titled "A Pipelined Noise-Shaping SAR ADC Using Ring Amplifier" was accepted to Electronics.
Congratulations Juyong Lee!
2021/06 Our paper titled "A 85dB DR 4MHz BW Pipelined Noise-Shaping SAR ADC with 1-2 MASH structure" was accepted
to IEEE Journal of Solid-State Circuits (JSSC). Congratulations Sein Oh!
2021/02 Our poster titled "Time-interleaved Noise-shaping SAR ADC with Redundancy Error Correction Technique" was
awarded in Korean Conference on Semiconductors (28th). Congratulations Kihyun Kim!
2020/09 Our paper titled "Low Power CMOS-Based Hall Sensor with Simple Structure Using Double-Sampling Delta-Sigma
ADC" was accepted to Sensors. Congratulations Ju Yong Lee!
2020/09 CSDL is funded by basic research project from National Research Foundation for 4 years
2020/04 CSDL is funded for AI Semiconductor Training Center from Ministry of Science and ICT for 5 years
2020/02 Our poster titled "Analog-to-Digital Converter for High-speed Communication" was awarded in Korean
Conference on Semiconductors (27th). Congratulations Younggyun Oh!
2020/02 Our paper titled "Bandpass ΔΣ ADC using Pipelined SAR ADC" was accepted to IEEE Electronic Letters.
Congratulations Sein Oh!
2020/01 Our paper titled "A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2 MASH structure" was
accepted to IEEE Custom Integrated Circuits Conference (CICC). Congratulations Sein Oh!
2019/12 CSDL is now funded by Samsung Electronics for Industry-Academic Technical Cooperation. Congratulations on
the first cooperation between Konkuk University and Samsung LSI.
2019/12 CSDL is funded by Samsung Research Funding & Incubation Center for Future Technology for three years.
We are looking for enthusiastic students:
Graduate Students (M.S. and Ph.D. students)
We are always looking for outstanding graduate students in the areas of integrated circuit design. Interested students can contact me by email (hichae@konkuk.ac.kr) with your resume or a short description of your background and interests.
Undergraduate Students (Interns)
We like to encourage undergraduates to get involved with research, especially if they intend to go to graduate school. We work with a small number of excellent undergraduate students each semester. Students should be familiar with materials in electronic circuits I, II.
Interested students can send me an email (hichae@konkuk.ac.kr) or drop by engineering building 424-1.