Home

K Charan

Research Scholar, SEAL Lab, Dept of CS, IIT Kharagpur
B Tech (ECE), TIU, Kolkata

At IIT Kharagpur's SEAL lab, current efforts focus on simulating out-of-order cores in RISC-V to automate testing for cryptographic leakage detection. Collaborations involve annotating registers, tainting data pathways, and advancing secure computation techniques in masked cryptography.

Previous research at IIT Tirupati included designing pipelined RISC-V processors using VHDL, Verilog, and Chisel. Contributions extended to digital IC design and developing solutions in electrical engineering. Proficient in Keras, PyTorch, and computer vision, with a commitment to innovation in computer architecture and secure systems.

Events/workshops/Training/Talks

SERB Karyashala Workshop in "Multimedia Processing and Analysis: Theory & Practice"

IIT Indore organized a high-end workshop on "Multimedia Processing and Analysis: Theory to Practice" from May 13-19, 2024, funded by the Science and Engineering Research Board (SERB) under their KARYASHALA scheme. The workshop covered recent trends and developments in advanced mathematical analysis and processing techniques for multimedia data, including 2D/3D images, video, virtual reality, biomedical imaging, and more. I am deeply grateful to have had the opportunity to attend this smoothly organized and enriching workshop by prof Dr Balasubramanyam Appina and the Multimedia Engineering and Perceptual Cognitive Analysis Group (MEPCAG) at the Department of Electrical Engineering, IIT Indore.

Interned at IIT Indore - Funded by SERB 2023