Juntaek Lim

Korea Advanced Institute of Science & Technology (KAIST) [Aug. 2022 ~ Present]

M.S. in School of Electrical Engineering

Advisor: Prof. Minsoo Rhu

Korea Advanced Institute of Science & Technology (KAIST) [Mar. 2018 ~ Aug. 2022]

B.S. in School of Electrical Engineering

Minor in School of Computing

Summa Cum Laude

Undergraduate Research Intern at Vertically Integrated Architecture Research Group (VIALab), KAIST

Dec. 2021 ~ Aug. 2022

• • DNN accelerator: implementation of cycle-level simulator of SCNN & analysis of various DNN accelerators

  • Mixture of Experts (MoE): analysis of prior work related to MoE including GShard code

KAIST EE Co-op Internship at Samsung Electronics, Hwaseong

Mar. 2021 ~ Aug. 2021

• Study of AXI protocol

• Study of the tiling scheme and dataflow used in Exynos NPU

• RTL design and synthesis for fetching unit (FU) of Exynos NPU

Juntaek Lim, Youngeun Kwon, Ranggi Hwang, Kiwan Maeng, Edward Suh, and Minsoo Rhu, "LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models," The 29th ACM International Conference on Architectural Support for  Programming Languages and Operating Systems (ASPLOS-29), San Diego, CA, USA, Mar. 2024

• • Acceptance Rate: 20% (81 among 409)

  • [Paper]

• Teaching Assistant, EE312: Introduction to Computer Architecture, Spring 2024 @KAIST

• Teaching Assistant, EE209: Programming Structure for Electrical Engineering, Fall 2023 @KAIST

• Teaching Assistant, EE312: Introduction to Computer Architecture, Spring 2023 @KAIST

• Programming Languages: Python, C, C++, CUDA, Verilog HDL

• Machine Learning Frameworks: PyTorch