Education

• Master Candidate in School of Electrical Engineering, Korea Advanced Institute of Science and Technology (03. 2019 - Present)

  • Advisor: Yang-Kyu Choi

  • GPA: 3.94/4.3

• B.S in School of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology (03. 2015 - 02. 2019)

  • Major: Electrical Engineering, Minor: Physics

  • Salutatorian, Summa Cum Laude, GPA: 4.02/4.3

Research Interests

• Neuromorphic Device & System

• Device TCAD Simulation

• Device Characterization by Machine Learning

Publications

1. Ji-Man Yu†, Gyeong-Jun Yun†, Moon-Seok Kim, Joon-Kyu Han, Da-Jin Kim, and Yang-Kyu Choi, "A Poly-Crystalline Silicon Nanowire Transistor with Independently Controlled Double-Gate for Physically Unclonable Function by Multi-States and Self-Destruction", Advacned Electronic Materials, (2021), † These authors equally contributed to this work. [Link]

2. Gyeong-Jun Yun†, Dae-Hwan Yun†, Jun-Young Park, Seong-Yeon Kim, and Yang-Kyu Choi, "Self-Heating Effects in 3-D Vertical-NAND (V-NAND) Flash Memory", IEEE Transactions on Electron Devices, (2020), † These authors equally contributed to this work. [Link]

3. Myung-Su Kim, Gyeong-Jun Yun, Myungsoo Seo, Da-Jin Kim, Ji-Man Yu, Hur Jae, Geon-Beom Lee, Dae-Hwan Yun, and Yang-Kyu Choi, "A Steep-Slope Phenomenon by Gate Charge Pumping in a MOSFET", IEEE Electron Device Letters, (2022). [Link]

4. Seong-Joo Han†, Joon-Kyu Han†, Gyeong-Jun Yun, Mun-Woo Lee, Ji-Man Yu, and Yang-Kyu Choi, "Ultra-fast Data Sanitization of SRAM by Back-biasing to Resist a Cold Boot Attack", Scientific Reports, (2021), † These authors equally contributed to this work. [Link]

5. [Published as Front Cover] Mun-Woo Lee, Joon-Kyu Han, Gyeong-Jun Yun, Ji-Man Yu, Geon-Beom Lee, Seong-Joo Han, and Yang-Kyu Choi, "A Temperature Sensor with a Thermillator", IEEE Electron Device Letters, (2021) [Link].

6. Joon-Kyu Han, Jungyeop Oh, Gyeong-Jun Yun, Dongeun Yoo, Myung-Su Kim, Ji-Man Yu, Sung-Yool Choi, and Yang-Kyu Choi, "Co-integration of single transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware", Science Advances, (2021) [Link]

7. Seong-Joo Han, Joon-Kyu Han, Myung-Su Kim, Gyeong-Jun Yun, Ji-Man Yu, Il-Woong Tcho, Myungsoo Seo, Geon-Beom Lee, and Yang-Kyu Choi, "Ternary Logic Decoder Using Independently Controlled Double-gate Si-NW MOSFETs", Scientific Reports, (2021) [Link]

8. Joon-Kyu Han, Gyeong-Jun Yun, Seong-Joo Han, Ji-Man Yu, and Yang-Kyu Choi, "One Biristor-Two Transistor (1B2T) Neuron With Reduced Output Voltage and Pulsewidth for Energy-Efficient Neuromorphic Hardware", IEEE Transactions on Electron Devices, (2020) [Link]

9. Joon-Kyu Han, Myungsoo Seo, Wu-Kang Kim, Moon-Seok Kim, Seong-Yeon Kim, Myung-Su Kim, Gyeong-Jun Yun, Geon-Beom Lee, Ji-Man Yu, and Yang-Kyu Choi, "Mimicry of Excitatory and Inhibitory Artificial Neuron with Leaky Integrate-and-Fire Function by a Single MOSFET", IEEE Electron Device Letters, (2019) [Link]

10. Myung-Su Kim, Jin-Ki Kim, Gyeong-Jun Yun, Ji-Man Yu, Joon-Kyu Han, Jung-Woo Lee, Seokho Seo, Shinhyun Choi, and Yang-Kyu Choi, "An Overturned Charge Injection Synaptic Transistor with a Floating-gate for Neuromorphic Hardware Computing", IEEE Electron Device Letters, Under Revision.

11. Gyeong-Jun Yun, Joon-Kyu Han, Mun-Woo Lee, and Yang-Kyu Choi, "Analysis and Design Methodology of Single MOSFET-Based Neuron", IEEE Transactions on Electron Devices, In Preparation.

Patents

1. Joon-Kyu Han, Gyeong-Jun Yun, Yang-Kyu Choi, "A SINGLE TRANSISTOR CAPABLE OF USING BOTH NEURON AND SYNAPTIC DEVICES, AND A NEUROMORPHIC SYSTEM USING IT", US (17037044)

2. Geon-Beom Lee, Gyeong-Jun Yun, Yang-Kyu Choi, "Biristor device, method of fabricating the same, and volatile memory apparatus including biristor device", KR (10-2020-0148873)

3. Joon-Kyu Han, Gyeong-Jun Yun, Yang-Kyu Choi, "A SINGLE TRANSISTOR CAPABLE OF USING BOTH NEURON AND SYNAPTIC DEVICES, AND A NEUROMORPHIC SYSTEM USING IT", KR (10-2019-0167547)

Awards and Honors

• Graduation with honors: Summa Cum Laude, Ulsan National Institute of Science and Technology, Korea

Projects

• Simulation study of device characteristics optimization of gate-less & capacitor-less vertical DRAM, SK Hynix Inc., Korea (Apr. 2019 - Apr. 2020)

• Samsung Electronics DS Division Strategic Industry-Academic Task, Samsung Electronics., Korea (Mar. 2019 - Jun. 2021)

• Samsung Electronics DS Division Strategic Industry-Academic Task, Samsung Electronics., Korea (Jul. 2021 - Jun. 2024)

Skills

• Device Fabrication

• Synopsys TCAD Senaturus, PyTorch

Other Activities

• Teaching Assistant for 'Introduction to VLSI Devices (EE561)', Spring, 2021

• Teaching Assistant for 'Introduction to Electronics Design Lab (EE305)', Fall, 2019

Reference

• Prof. Yang-Kyu Choi (Academic Advisor)

  • School of Electrical Engineering, KAIST, 291 Daehak-ro, Yueong-gu, Daejeon, South Korea, 34141

  • E-mail: ykchoi@ee.kaist.ac.kr

  • Tel: +82-42-350-3477