Accepted to the 2021 ACM SIGPLAN Machine Programming Symposium (MAPS): "ControlFlag: A Self-Supervised Idiosyncratic Pattern Detection System for Software Control Structures".
Accepted to the 2021 ACM SIGPLAN Machine Programming Symposium (MAPS): "Predictive Locality Optimization for Higher-Order Tensor Computations".
Accepted to 2021 GECCO Workshop on Evolutionary Computation Software Systems (EvoSoft): "AI Programmer: Autonomously Creating Software Programs Using Genetic Algorithms".
44th patent issued: "Extend GPU/CPU coherency to multi-GPU cores" (10,956,330)
43rd patent issued: "Methods and apparatus to detect memory leaks in computing systems" (10,956,298)
42nd patent issued: "Neural network optimization mechanism" (10,929,749)
41st patent issued: "Methods and apparatus for runtime multi-scheduling of software executing on a heterogeneous system" (10,908,884)
Upcoming keynote address @ MIT's DSAIL 2021 virtual retreat: "A Glimpse Into Machine Programming @ Intel Labs"
40th patent issued: "Compute optimization for deep neural networks" (10,902,547)
39th patent issued: "Coordination and increased utilization of graphics processors during inference" (10,891,707)
A video on our ControlFlag system
38th patent issued: "Systems and methods for determining a configuration of a microarchitecture" (10,853,554)
Patent issued: "Systems and methods for determining a configuration of a microarchitecture" (10,853,554)
Invited machine programming talk @ MIT & NeurIPS 2020, ML for Systems Workshop: "A Glimpse Into Machine Programming @ Intel Labs"
Paper accepted to 2020 NeurIPS Computer-Assisted Programming Workshop "Software Language Comprehension using a Program-Derived Semantics Graph"
Paper accepted to NeurIPS 2020 ML for Systems Workshop: "ControlFlag: A Self-supervised Idiosyncratic Pattern Detection System for Software Control Structures"
37th patent issued: "Methods and apparatus to detect anomalies of a monitored system" (10,802,942)
Invited MP talk @ UWisc: "Machine Programming: Challenges and Opportunities"
36th patent issued: "Programmable coarse grained and sparse matrix compute hardware with advanced scheduling" (10,769,748)
Keynote @ Department of Energy's Program Synthesis for Scientific Computing: "Machine Programming: Challenges and Opportunities"
Patent issued: "Neural Network Scheduling Mechanism" (10,719,760)
CACM article on machine programming: "Your Wish is My CMD" by Neil Savage
Paper accepted to MAPL 2020: "Learned Garbage Collection" (joint with MIT)
Paper accepted to CAV 2020: "An Abstraction-Based Framework for Neural Network Verification"
Patent issued: "Detecting Mobile Device Sensor Malfunctions" (10,591,313)
Patent issued: "Extend GPU/CPU coherency to multi-GPU cores" (10,521,349)
Venturebeat has published an article on my team's machine programming research @ NeurIPS '19!
Patent issued: "Efficient sharing and compression expansion of data across processing systems" (10,497,084)
Patent issued: "Methods and systems for performing a replay execution" (10,474,471)
Intel Division Recognition Award: "Outstanding Leadership of Machine Programming Patent Harvest"
Patent issued: "Compute optimization mechanism for deep neural networks" (10,417,734)
Patent issued: "Compute optimization mechanism for deep neural networks" (10,417,731)
Patent issued: "Autonomous machines through cloud, error corrections, and predictions" (10,410,115)
Accepted to NeurIPS: "A Zero-Positive Learning Approach for Diagnosing Software Performance Regressions"
Opening address for Machine Programming Day @ Berkeley: "Intel's Machine Programming Pioneering Research Vision"
Accepted invitation as chair of MAPL steering committee.
Q2 Intel Labs' Eureka Award Winner (inventor with most patent applications filed in a quarter (30 new filings)).
Accepted invitation to serve on SysML 2020 program committee.
Patent issued: "Autonomous vehicle advanced sensing and response"
Intel's Annual Gordon Moore Award Nomination: "Informed risk-taking across Intel Labs, PSG, SSG, and University Research that has furthered Intel's FPGA innovations"
Category: Excellence in Risk Taking.
Team: Aravind Dasu, Mahesh Iyer, Eriko Nurvitadhi, Michael Adler, Justin Gottschlich, Mondira Pant, Todd Younkin
Intel Tech Insights Leadership Award: "Machine Programming: A Radical Approach to Automating Software" (Justin Gottschlich and Tim Mattson)
Patent issued: "Extend GPU/CPU coherency to multi-GPU cores"
DATSA has been open sourced.
SysML whitepaper: "SysML: The New Frontier of Machine Learning Systems"
Patent issued: "Detecting root causes of use-after-free memory errors"
Invited talk to Dawn Song's research team at Berkeley: "Anomaly detection, machine programming, and other AI research at Intel"
Patent issued (milestone, 20th issued patent): "Programmable coarse grained and sparse matrix compute hardware with advanced scheduling."
Co-teaching with Insup Lee and James Weimer: CIS 700-002: Topics in Safe Autonomy, Spring 2019
Invited talk at Intel's NeurIPS special luncheon: "Anomaly Detection: Today and Beyond"
NeurIPS spotlight talk: "Precision and Recall for Time Series"
NeurIPS 3-minute teaser video: "Precision and Recall for Time Series"
Intel Labs Division Recognition Award for creating and leading the Anomaly Detection IP Think Tank.
Invited talk at SPLASH-I: "The Future of AI: Machine Programmers and Their Necessary Self-Awareness"
Invited talk at Intel's Autonomous Driving Community of Practice Workshop: "Autonomous Vehicles and the Anomalous 1%"
MAPL presentation: "The Three Pillars of Machine Programming" (joint with MIT)
Program committee member, SysML 2019.
Invited talk at VMware Research: "Anomaly Detection for Practical Systems (and a Tiny Bit of Machine Programming)"
Special seminar at University of Pennsylvania: "The Future of Anomaly Detection" (slides forthcoming)
Intel's Principal Investigator for the joint Intel/NSF CAPA research center.
Program Chair and Founding Member, First ACM SIGPLAN Workshop on Machine Learning and Programming Languages (MAPL)
Deputy Technical Lead and Founding Member, NSF/Intel Partnership on Computer Assisted Programming for Heterogeneous Architectures
Talk at Intel's High Performance Developers Conference: "Using Machine Learning To Avoid the Unwanted"
Intel Research Velocity Challenge Winner: "Using Deep Neural Networks to Identify and Fix Performance and Correctness Anomalies in Data Centers"
Application Track Chair, TRANSACT 2013